diff --git a/incl/iss/arch/riscv_hart_mu_p.h b/incl/iss/arch/riscv_hart_mu_p.h
index 353dfd8..2e22d63 100644
--- a/incl/iss/arch/riscv_hart_mu_p.h
+++ b/incl/iss/arch/riscv_hart_mu_p.h
@@ -330,6 +330,7 @@ protected:
     iss::status write_dcsr_reg(unsigned addr, reg_t val);
     iss::status read_dpc_reg(unsigned addr, reg_t &val);
     iss::status write_dpc_reg(unsigned addr, reg_t val);
+    iss::status write_pmpcfg_reg(unsigned addr, reg_t val);
 
     reg_t mhartid_reg{0x0};
     std::function<iss::status(phys_addr_t, unsigned, uint8_t *const)>mem_read_cb;
@@ -425,7 +426,7 @@ riscv_hart_mu_p<BASE, FEAT>::riscv_hart_mu_p()
         }
         for(size_t i=pmpcfg0; i<=pmpcfg3; ++i){
             csr_rd_cb[i] = &this_class::read_csr_reg;
-            csr_wr_cb[i] = &this_class::write_csr_reg;
+            csr_wr_cb[i] = &this_class::write_pmpcfg_reg;
         }
     }
     if(FEAT & FEAT_EXT_N){
@@ -544,6 +545,12 @@ template <typename BASE, features_e FEAT> std::pair<uint64_t, bool> riscv_hart_m
     throw std::runtime_error("memory load file not found");
 }
 
+template<typename BASE, features_e FEAT>
+inline iss::status riscv_hart_mu_p<BASE, FEAT>::write_pmpcfg_reg(unsigned addr, reg_t val) {
+    csr[addr] = val & 0x9f9f9f9f;
+    return iss::Ok;
+}
+
 template <typename BASE, features_e FEAT> bool riscv_hart_mu_p<BASE, FEAT>::pmp_check(const access_type type, const uint64_t addr, const unsigned len) {
     constexpr auto PMP_SHIFT=2U;
     constexpr auto PMP_R = 0x1U;