From 95ba5c901a8ece103946f6f6aaee3734b0668837 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sun, 14 May 2023 17:00:37 +0200 Subject: [PATCH] re-introduces last_branch register --- gen_input/templates/CORENAME.cpp.gtl | 1 + gen_input/templates/CORENAME.h.gtl | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/gen_input/templates/CORENAME.cpp.gtl b/gen_input/templates/CORENAME.cpp.gtl index b99a67e..07ce7a3 100644 --- a/gen_input/templates/CORENAME.cpp.gtl +++ b/gen_input/templates/CORENAME.cpp.gtl @@ -34,6 +34,7 @@ def getRegisterSizes(){ def regs = registers.collect{it.size} regs[-1]=64 // correct for NEXT_PC //regs+=[32, 32, 64, 64, 64, 32] // append TRAP_STATE, PENDING_TRAP, ICOUNT, CYCLE, INSTRET, INSTRUCTION + regs += [32] // append LAST_BRANCH return regs } %> diff --git a/gen_input/templates/CORENAME.h.gtl b/gen_input/templates/CORENAME.h.gtl index 1765fde..8f10609 100644 --- a/gen_input/templates/CORENAME.h.gtl +++ b/gen_input/templates/CORENAME.h.gtl @@ -38,6 +38,7 @@ def nativeTypeSize(int size){ def getRegisterSizes(){ def regs = registers.collect{nativeTypeSize(it.size)} // regs+=[32,32, 64, 64, 64, 32] // append TRAP_STATE, PENDING_TRAP, ICOUNT, CYCLE, INSTRET, INSTRUCTION + regs += [32] // append LAST_BRANCH return regs } def getRegisterOffsets(){ @@ -91,7 +92,7 @@ template <> struct traits<${coreDef.name.toLowerCase()}> { constexpr static unsigned FP_REGS_SIZE = ${constants.find {it.name=='FLEN'}?.value?:0}; enum reg_e { - ${registers.collect{it.name}.join(', ')}, NUM_REGS + ${registers.collect{it.name}.join(', ')}, NUM_REGS, LAST_BRANCH=NUM_REGS }; using reg_t = uint${addrDataWidth}_t; @@ -162,6 +163,7 @@ struct ${coreDef.name.toLowerCase()}: public arch_if { registers.each { reg -> if(reg.size>0) {%> uint${byteSize(reg.size)}_t ${reg.name} = 0;<% }}%> + uint32_t last_branch = 0; } reg; #pragma pack(pop) uint32_t trap_state = 0, pending_trap = 0;