diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 0c766b5..123f8a6 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -967,7 +967,7 @@ template iss::status riscv_hart_m_p template iss::status riscv_hart_m_p::read_intstatus(unsigned addr, reg_t& val) { - val = (clic_mprev_lvl&0xff) <<24; + val = (clic_mact_lvl&0xff) <<24; return iss::Ok; } diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index bb9684a..1b828fe 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -1161,9 +1161,9 @@ template iss::status riscv_hart_mu_p iss::status riscv_hart_mu_p::read_intstatus(unsigned addr, reg_t& val) { auto mode = (addr >> 8) & 0x3; - val = clic_uprev_lvl&0xff; + val = clic_uact_lvl&0xff; if(mode==0x3) - val += (clic_mprev_lvl&0xff) <<24; + val += (clic_mact_lvl&0xff) <<24; return iss::Ok; }