diff --git a/src/iss/arch/tgc_c.h b/src/iss/arch/tgc_c.h
index 2b0c9bc..f0d53f3 100644
--- a/src/iss/arch/tgc_c.h
+++ b/src/iss/arch/tgc_c.h
@@ -53,7 +53,7 @@ template <> struct traits<tgc_c> {
     static constexpr std::array<const char*, 36> reg_aliases{
         {"ZERO", "RA", "SP", "GP", "TP", "T0", "T1", "T2", "S0", "S1", "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "S2", "S3", "S4", "S5", "S6", "S7", "S8", "S9", "S10", "S11", "T3", "T4", "T5", "T6", "PC", "NEXT_PC", "PRIV", "DPC"}};
 
-    enum constants {MISA_VAL=0b01000000000000000001000100000100, MARCHID_VAL=0x80000003, PGMASK=0b111111111111, XLEN=32, INSTR_ALIGNMENT=2, RFS=32, fence=0, fencei=1, fencevmal=2, fencevmau=3, CSR_SIZE=4096, MUL_LEN=64};
+    enum constants {MISA_VAL=1073746180, MARCHID_VAL=2147483651, XLEN=32, INSTR_ALIGNMENT=2, RFS=32, fence=0, fencei=1, fencevmal=2, fencevmau=3, CSR_SIZE=4096, MUL_LEN=64};
 
     constexpr static unsigned FP_REGS_SIZE = 0;
 
diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp
index e59d80d..c94b716 100644
--- a/src/vm/interp/vm_tgc_c.cpp
+++ b/src/vm/interp/vm_tgc_c.cpp
@@ -389,7 +389,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = *PC + (int32_t)imm;
+                                        *(X+rd) = (uint32_t)(*PC + (int32_t)imm);
                                     }
                                 }
                             }
@@ -419,9 +419,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     }
                                     else {
                                         if(rd !=  0) {
-                                            *(X+rd) = *PC +  4;
+                                            *(X+rd) = (uint32_t)(*PC +  4);
                                         }
-                                        *NEXT_PC = *PC + (int32_t)sext<21>(imm);
+                                        *NEXT_PC = (uint32_t)(*PC + (int32_t)sext<21>(imm));
                                         this->core.reg.last_branch = 1;
                                     }
                                 }
@@ -448,13 +448,13 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t new_pc = (*(X+rs1) + (int16_t)sext<12>(imm)) & ~ 0x1;
+                                    uint32_t new_pc = (uint32_t)((*(X+rs1) + (int16_t)sext<12>(imm)) & ~ 0x1);
                                     if(new_pc % traits::INSTR_ALIGNMENT) {
                                         raise(0,  0);
                                     }
                                     else {
                                         if(rd !=  0) {
-                                            *(X+rd) = *PC +  4;
+                                            *(X+rd) = (uint32_t)(*PC +  4);
                                         }
                                         *NEXT_PC = new_pc & ~ 0x1;
                                         this->core.reg.last_branch = 1;
@@ -488,7 +488,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                             raise(0,  0);
                                         }
                                         else {
-                                            *NEXT_PC = *PC + (int16_t)sext<13>(imm);
+                                            *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm));
                                             this->core.reg.last_branch = 1;
                                         }
                                     }
@@ -521,7 +521,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                             raise(0,  0);
                                         }
                                         else {
-                                            *NEXT_PC = *PC + (int16_t)sext<13>(imm);
+                                            *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm));
                                             this->core.reg.last_branch = 1;
                                         }
                                     }
@@ -554,7 +554,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                             raise(0,  0);
                                         }
                                         else {
-                                            *NEXT_PC = *PC + (int16_t)sext<13>(imm);
+                                            *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm));
                                             this->core.reg.last_branch = 1;
                                         }
                                     }
@@ -587,7 +587,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                             raise(0,  0);
                                         }
                                         else {
-                                            *NEXT_PC = *PC + (int16_t)sext<13>(imm);
+                                            *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm));
                                             this->core.reg.last_branch = 1;
                                         }
                                     }
@@ -620,7 +620,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                             raise(0,  0);
                                         }
                                         else {
-                                            *NEXT_PC = *PC + (int16_t)sext<13>(imm);
+                                            *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm));
                                             this->core.reg.last_branch = 1;
                                         }
                                     }
@@ -653,7 +653,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                             raise(0,  0);
                                         }
                                         else {
-                                            *NEXT_PC = *PC + (int16_t)sext<13>(imm);
+                                            *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<13>(imm));
                                             this->core.reg.last_branch = 1;
                                         }
                                     }
@@ -681,7 +681,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm);
+                                    uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
                                     int8_t read_res = super::template read_mem<int8_t>(traits::MEM, load_address);
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LB;
                                     int8_t res = (int8_t)read_res;
@@ -712,7 +712,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm);
+                                    uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
                                     int16_t read_res = super::template read_mem<int16_t>(traits::MEM, load_address);
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LH;
                                     int16_t res = (int16_t)read_res;
@@ -743,7 +743,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm);
+                                    uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
                                     int32_t read_res = super::template read_mem<int32_t>(traits::MEM, load_address);
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LW;
                                     int32_t res = (int32_t)read_res;
@@ -774,10 +774,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm);
+                                    uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
                                     uint8_t read_res = super::template read_mem<uint8_t>(traits::MEM, load_address);
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LBU;
-                                    uint8_t res = (uint8_t)read_res;
+                                    uint8_t res = read_res;
                                     if(rd !=  0) {
                                         *(X+rd) = (uint32_t)res;
                                     }
@@ -805,10 +805,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm);
+                                    uint32_t load_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
                                     uint16_t read_res = super::template read_mem<uint16_t>(traits::MEM, load_address);
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_LHU;
-                                    uint16_t res = (uint16_t)read_res;
+                                    uint16_t res = read_res;
                                     if(rd !=  0) {
                                         *(X+rd) = (uint32_t)res;
                                     }
@@ -836,8 +836,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t store_address = *(X+rs1) + (int16_t)sext<12>(imm);
-                                    super::template write_mem<uint8_t>(traits::MEM, store_address, (int8_t)*(X+rs2));
+                                    uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
+                                    super::template write_mem<uint8_t>(traits::MEM, store_address, (uint8_t)*(X+rs2));
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_SB;
                                 }
                             }
@@ -863,8 +863,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t store_address = *(X+rs1) + (int16_t)sext<12>(imm);
-                                    super::template write_mem<uint16_t>(traits::MEM, store_address, (int16_t)*(X+rs2));
+                                    uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
+                                    super::template write_mem<uint16_t>(traits::MEM, store_address, (uint16_t)*(X+rs2));
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_SH;
                                 }
                             }
@@ -890,8 +890,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t store_address = *(X+rs1) + (int16_t)sext<12>(imm);
-                                    super::template write_mem<uint32_t>(traits::MEM, store_address, (int32_t)*(X+rs2));
+                                    uint32_t store_address = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
+                                    super::template write_mem<uint32_t>(traits::MEM, store_address, (uint32_t)*(X+rs2));
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_SW;
                                 }
                             }
@@ -918,7 +918,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = *(X+rs1) + (int16_t)sext<12>(imm);
+                                        *(X+rd) = (uint32_t)(*(X+rs1) + (int16_t)sext<12>(imm));
                                     }
                                 }
                             }
@@ -1134,7 +1134,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = (int32_t)*(X+rs1) >> shamt;
+                                        *(X+rd) = (uint32_t)((int32_t)*(X+rs1) >> shamt);
                                     }
                                 }
                             }
@@ -1161,7 +1161,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = *(X+rs1) + *(X+rs2);
+                                        *(X+rd) = (uint32_t)(*(X+rs1) + *(X+rs2));
                                     }
                                 }
                             }
@@ -1188,7 +1188,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = *(X+rs1) - *(X+rs2);
+                                        *(X+rd) = (uint32_t)(*(X+rs1) - *(X+rs2));
                                     }
                                 }
                             }
@@ -1350,7 +1350,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = (int32_t)*(X+rs1) >> (*(X+rs2) & (traits::XLEN -  1));
+                                        *(X+rd) = (uint32_t)((int32_t)*(X+rs1) >> (*(X+rs2) & (traits::XLEN -  1)));
                                     }
                                 }
                             }
@@ -1427,7 +1427,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 4;
                 // execute instruction
                 {
-                                super::template write_mem<uint8_t>(traits::FENCE, traits::fence, pred <<  4 | succ);
+                                super::template write_mem<uint32_t>(traits::FENCE, traits::fence, (uint8_t)pred <<  4 | succ);
                                 if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_FENCE;
                             }
                 TRAP_FENCE:break;
@@ -1706,7 +1706,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 4;
                 // execute instruction
                 {
-                                super::template write_mem<uint16_t>(traits::FENCE, traits::fencei, imm);
+                                super::template write_mem<uint32_t>(traits::FENCE, traits::fencei, imm);
                                 if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_FENCE_I;
                             }
                 TRAP_FENCE_I:break;
@@ -1731,7 +1731,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    int64_t res = (int64_t)(int32_t)*(X+rs1) * (int64_t)(int32_t)*(X+rs2);
+                                    int64_t res = (int32_t)*(X+rs1) * (int32_t)*(X+rs2);
                                     if(rd != 0) {
                                         *(X+rd) = (uint32_t)res;
                                     }
@@ -1759,7 +1759,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    int64_t res = (int64_t)(int32_t)*(X+rs1) * (int64_t)(int32_t)*(X+rs2);
+                                    int64_t res = (int32_t)*(X+rs1) * (int32_t)*(X+rs2);
                                     if(rd != 0) {
                                         *(X+rd) = (uint32_t)(res >> traits::XLEN);
                                     }
@@ -1787,7 +1787,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    int64_t res = (int64_t)(int32_t)*(X+rs1) * (uint64_t)*(X+rs2);
+                                    int64_t res = (int32_t)*(X+rs1) * *(X+rs2);
                                     if(rd != 0) {
                                         *(X+rd) = (uint32_t)(res >> traits::XLEN);
                                     }
@@ -1815,7 +1815,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint64_t res = (uint64_t)*(X+rs1) * (uint64_t)*(X+rs2);
+                                    uint64_t res = *(X+rs1) * *(X+rs2);
                                     if(rd != 0) {
                                         *(X+rd) = (uint32_t)(res >> traits::XLEN);
                                     }
@@ -1852,11 +1852,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                                 *(X+rd) = MMIN;
                                             }
                                             else {
-                                                *(X+rd) = dividend / divisor;
+                                                *(X+rd) = (uint32_t)(dividend / divisor);
                                             }
                                         }
                                         else {
-                                            *(X+rd) = (int32_t)- 1;
+                                            *(X+rd) = (uint32_t)- 1;
                                         }
                                     }
                                 }
@@ -1885,12 +1885,12 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 else {
                                     if(*(X+rs2) !=  0) {
                                         if(rd != 0) {
-                                            *(X+rd) = *(X+rs1) / *(X+rs2);
+                                            *(X+rd) = (uint32_t)(*(X+rs1) / *(X+rs2));
                                         }
                                     }
                                     else {
                                         if(rd != 0) {
-                                            *(X+rd) = (int32_t)- 1;
+                                            *(X+rd) = (uint32_t)- 1;
                                         }
                                     }
                                 }
@@ -1926,7 +1926,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                         }
                                         else {
                                             if(rd != 0) {
-                                                *(X+rd) = (int32_t)*(X+rs1) % (int32_t)*(X+rs2);
+                                                *(X+rd) = (uint32_t)((int32_t)*(X+rs1) % (int32_t)*(X+rs2));
                                             }
                                         }
                                     }
@@ -1980,7 +1980,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                     /* generate console output when executing the command */
                     auto mnemonic = fmt::format(
                         "{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "caddi4spn"),
-                        fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
+                        fmt::arg("rd", name(8+rd)), fmt::arg("imm", imm));
                     this->core.disass_output(pc.val, mnemonic);
                 }
                 // used registers
@@ -1989,7 +1989,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 // execute instruction
                 {
                                 if(imm) {
-                                    *(X+rd +  8) = *(X+2) + imm;
+                                    *(X+rd +  8) = (uint32_t)(*(X+2) + imm);
                                 }
                                 else {
                                     raise(0,  2);
@@ -2013,10 +2013,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 2;
                 // execute instruction
                 {
-                    uint32_t load_address = *(X+rs1 +  8) + uimm;
+                    uint32_t load_address = (uint32_t)(*(X+rs1 +  8) + uimm);
                     int32_t read_res = super::template read_mem<int32_t>(traits::MEM, load_address);
                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CLW;
-                    *(X+rd +  8) = (int32_t)read_res;
+                    *(X+rd +  8) = (uint32_t)(int32_t)read_res;
                 }
                 TRAP_CLW:break;
             }// @suppress("No break at end of case")
@@ -2036,8 +2036,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 2;
                 // execute instruction
                 {
-                    uint32_t load_address = *(X+rs1 +  8) + uimm;
-                    super::template write_mem<uint32_t>(traits::MEM, load_address, (int32_t)*(X+rs2 +  8));
+                    uint32_t load_address = (uint32_t)(*(X+rs1 +  8) + uimm);
+                    super::template write_mem<uint32_t>(traits::MEM, load_address, (uint32_t)*(X+rs2 +  8));
                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSW;
                 }
                 TRAP_CSW:break;
@@ -2062,7 +2062,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rs1 !=  0) {
-                                        *(X+rs1) = *(X+rs1) + (int8_t)sext<6>(imm);
+                                        *(X+rs1) = (uint32_t)(*(X+rs1) + (int8_t)sext<6>(imm));
                                     }
                                 }
                             }
@@ -2095,8 +2095,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 2;
                 // execute instruction
                 {
-                    *(X+1) = *PC +  2;
-                    *NEXT_PC = *PC + (int16_t)sext<12>(imm);
+                    *(X+1) = (uint32_t)(*PC +  2);
+                    *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<12>(imm));
                     this->core.reg.last_branch = 1;
                 }
                 TRAP_CJAL:break;
@@ -2121,7 +2121,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = (int8_t)sext<6>(imm);
+                                        *(X+rd) = (uint32_t)((int8_t)sext<6>(imm));
                                     }
                                 }
                             }
@@ -2146,7 +2146,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                         raise(0,  2);
                     }
                     if(rd !=  0) {
-                        *(X+rd) = (int32_t)sext<18>(imm);
+                        *(X+rd) = (uint32_t)((int32_t)sext<18>(imm));
                     }
                 }
                 TRAP_CLUI:break;
@@ -2166,7 +2166,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 // execute instruction
                 {
                                 if(nzimm) {
-                                    *(X+2) = *(X+2) + (int16_t)sext<10>(nzimm);
+                                    *(X+2) = (uint32_t)(*(X+2) + (int16_t)sext<10>(nzimm));
                                 }
                                 else {
                                     raise(0,  2);
@@ -2223,11 +2223,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 // execute instruction
                 {
                     if(shamt) {
-                        *(X+rs1 +  8) = ((int32_t)*(X+rs1 +  8)) >> shamt;
+                        *(X+rs1 +  8) = (uint32_t)(((int32_t)*(X+rs1 +  8)) >> shamt);
                     }
                     else {
                         if(traits::XLEN ==  128) {
-                            *(X+rs1 +  8) = ((int32_t)*(X+rs1 +  8)) >>  64;
+                            *(X+rs1 +  8) = (uint32_t)(((int32_t)*(X+rs1 +  8)) >>  64);
                         }
                     }
                 }
@@ -2248,7 +2248,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 2;
                 // execute instruction
                 {
-                    *(X+rs1 +  8) = *(X+rs1 +  8) & (int8_t)sext<6>(imm);
+                    *(X+rs1 +  8) = (uint32_t)(*(X+rs1 +  8) & (int8_t)sext<6>(imm));
                 }
                 TRAP_CANDI:break;
             }// @suppress("No break at end of case")
@@ -2267,7 +2267,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 2;
                 // execute instruction
                 {
-                    *(X+rd +  8) = *(X+rd +  8) - *(X+rs2 +  8);
+                    *(X+rd +  8) = (uint32_t)(*(X+rd +  8) - *(X+rs2 +  8));
                 }
                 TRAP_CSUB:break;
             }// @suppress("No break at end of case")
@@ -2341,7 +2341,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 *NEXT_PC = *PC + 2;
                 // execute instruction
                 {
-                                *NEXT_PC = *PC + (int16_t)sext<12>(imm);
+                                *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<12>(imm));
                                 this->core.reg.last_branch = 1;
                             }
                 TRAP_CJ:break;
@@ -2362,7 +2362,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 // execute instruction
                 {
                                 if(*(X+rs1 +  8) ==  0) {
-                                    *NEXT_PC = *PC + (int16_t)sext<9>(imm);
+                                    *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<9>(imm));
                                     this->core.reg.last_branch = 1;
                                 }
                             }
@@ -2384,7 +2384,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                 // execute instruction
                 {
                                 if(*(X+rs1 +  8) !=  0) {
-                                    *NEXT_PC = *PC + (int16_t)sext<9>(imm);
+                                    *NEXT_PC = (uint32_t)(*PC + (int16_t)sext<9>(imm));
                                     this->core.reg.last_branch = 1;
                                 }
                             }
@@ -2435,10 +2435,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                         raise(0,  2);
                     }
                     else {
-                        int32_t read_res = super::template read_mem<int32_t>(traits::MEM, *(X+2) + uimm);
+                        uint32_t offs = (uint32_t)(*(X+2) + uimm);
+                        int32_t read_res = super::template read_mem<int32_t>(traits::MEM, offs);
                         if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CLWSP;
-                        int32_t res = read_res;
-                        *(X+rd) = (int32_t)res;
+                        int32_t res = (int32_t)read_res;
+                        *(X+rd) = (uint32_t)res;
                     }
                 }
                 TRAP_CLWSP:break;
@@ -2526,7 +2527,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     if(rd !=  0) {
-                                        *(X+rd) = *(X+rd) + *(X+rs2);
+                                        *(X+rd) = (uint32_t)(*(X+rd) + *(X+rs2));
                                     }
                                 }
                             }
@@ -2551,7 +2552,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                 }
                                 else {
                                     uint32_t new_pc = *(X+rs1);
-                                    *(X+1) = *PC +  2;
+                                    *(X+1) = (uint32_t)(*PC +  2);
                                     *NEXT_PC = new_pc & ~ 0x1;
                                     this->core.reg.last_branch = 1;
                                 }
@@ -2590,7 +2591,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
                                     raise(0,  2);
                                 }
                                 else {
-                                    uint32_t offs = *(X+2) + uimm;
+                                    uint32_t offs = (uint32_t)(*(X+2) + uimm);
                                     super::template write_mem<uint32_t>(traits::MEM, offs, (uint32_t)*(X+rs2));
                                     if(this->core.reg.trap_state>=0x80000000UL) goto TRAP_CSWSP;
                                 }
diff --git a/src/vm/tcc/vm_tgc_c.cpp b/src/vm/tcc/vm_tgc_c.cpp
index f47fb28..495d97e 100644
--- a/src/vm/tcc/vm_tgc_c.cpp
+++ b/src/vm/tcc/vm_tgc_c.cpp
@@ -423,7 +423,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int32_t)imm,32)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int32_t)imm,32))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -458,9 +458,9 @@ private:
         	}
         	else{
         		if(rd!= 0) {
-        		    tu.store(rd + traits::X0,tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 4,32)));
+        		    tu.store(rd + traits::X0,tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 4,8))),32,true));
         		}
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int32_t)sext<21>(imm),32)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int32_t)sext<21>(imm),32))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -494,12 +494,12 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto new_pc = tu.assignment(tu.bitwise_and((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),tu.constant(~ 0x1,8)),32);
+        	auto new_pc = tu.assignment(tu.ext((tu.bitwise_and((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),tu.constant(~ 0x1,8))),32,true),32);
         	tu.open_if(tu.srem(new_pc,tu.constant(static_cast<uint32_t>(traits:: INSTR_ALIGNMENT),32)));
         	this->gen_raise_trap(tu, 0,  0);
         	tu.open_else();
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 4,32)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 4,8))),32,true));
         	}
         	auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(new_pc,tu.constant(~ 0x1,8)),32);
         	tu.store(traits::NEXT_PC, PC_val_v);
@@ -539,7 +539,7 @@ private:
         	if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0,  0);
         	}
         	else{
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -578,7 +578,7 @@ private:
         	if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0,  0);
         	}
         	else{
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -617,7 +617,7 @@ private:
         	if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0,  0);
         	}
         	else{
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -656,7 +656,7 @@ private:
         	if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0,  0);
         	}
         	else{
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -695,7 +695,7 @@ private:
         	if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0,  0);
         	}
         	else{
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -734,7 +734,7 @@ private:
         	if(imm%static_cast<uint32_t>(traits:: INSTR_ALIGNMENT)){ this->gen_raise_trap(tu, 0,  0);
         	}
         	else{
-        		auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16)),32);
+        		auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<13>(imm),16))),32,true),32);
         		tu.store(traits::NEXT_PC, PC_val_v);
         		tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         	}
@@ -769,7 +769,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto load_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
+        	auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
         	auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 8),8,false),8);
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,tu.ext(res,32,true));
@@ -804,7 +804,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto load_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
+        	auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
         	auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 16),16,false),16);
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,tu.ext(res,32,true));
@@ -839,7 +839,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto load_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
+        	auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
         	auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 32),32,false),32);
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,tu.ext(res,32,true));
@@ -874,8 +874,8 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto load_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
-        	auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 8),8,true),8);
+        	auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
+        	auto res = tu.assignment(tu.read_mem(traits::MEM, load_address, 8),8);
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,tu.ext(res,32,true));
         	}
@@ -909,8 +909,8 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto load_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
-        	auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, load_address, 16),16,true),16);
+        	auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
+        	auto res = tu.assignment(tu.read_mem(traits::MEM, load_address, 16),16);
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,tu.ext(res,32,true));
         	}
@@ -944,8 +944,8 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto store_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
-        	tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),8,false));
+        	auto store_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
+        	tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),8,true));
         }
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
@@ -976,8 +976,8 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto store_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
-        	tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),16,false));
+        	auto store_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
+        	tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),16,true));
         }
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
@@ -1008,8 +1008,8 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto store_address = tu.assignment(tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)),32);
-        	tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),32,false));
+        	auto store_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
+        	tu.write_mem(traits::MEM, store_address, tu.ext(tu.load(rs2+ traits::X0, 0),32,true));
         }
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
@@ -1041,7 +1041,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int16_t)sext<12>(imm),16))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1074,7 +1074,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.conditionalAssignment((tu.icmp(ICmpInst::ICMP_SLT,tu.ext(tu.load(rs1+ traits::X0, 0),32,true),tu.constant((int16_t)sext<12>(imm),16))), tu.constant( 1,32),tu.constant( 0,32)));
+        	    tu.store(rd + traits::X0,tu.conditionalAssignment((tu.icmp(ICmpInst::ICMP_SLT,tu.ext(tu.load(rs1+ traits::X0, 0),32,true),tu.constant((int16_t)sext<12>(imm),16))), tu.constant( 1,8),tu.constant( 0,8)));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1107,7 +1107,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.conditionalAssignment((tu.icmp(ICmpInst::ICMP_SLT,tu.load(rs1+ traits::X0, 0),tu.constant((uint32_t)((int16_t)sext<12>(imm)),32))), tu.constant( 1,32),tu.constant( 0,32)));
+        	    tu.store(rd + traits::X0,tu.conditionalAssignment((tu.icmp(ICmpInst::ICMP_SLT,tu.load(rs1+ traits::X0, 0),tu.constant((uint32_t)((int16_t)sext<12>(imm)),32))), tu.constant( 1,8),tu.constant( 0,8)));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1305,7 +1305,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.lshr(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),tu.constant(shamt,8)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.lshr(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),tu.constant(shamt,8))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1338,7 +1338,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.add(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1371,7 +1371,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.sub(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.sub(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1437,7 +1437,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.conditionalAssignment(tu.icmp(ICmpInst::ICMP_SLT,tu.ext(tu.load(rs1+ traits::X0, 0),32,true),tu.ext(tu.load(rs2+ traits::X0, 0),32,true)), tu.constant( 1,32),tu.constant( 0,32)));
+        	    tu.store(rd + traits::X0,tu.conditionalAssignment(tu.icmp(ICmpInst::ICMP_SLT,tu.ext(tu.load(rs1+ traits::X0, 0),32,true),tu.ext(tu.load(rs2+ traits::X0, 0),32,true)), tu.constant( 1,8),tu.constant( 0,8)));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1470,7 +1470,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.conditionalAssignment(tu.icmp(ICmpInst::ICMP_SLT,tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)), tu.constant( 1,32),tu.constant( 0,32)));
+        	    tu.store(rd + traits::X0,tu.conditionalAssignment(tu.icmp(ICmpInst::ICMP_SLT,tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)), tu.constant( 1,8),tu.constant( 0,8)));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1569,7 +1569,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.lshr(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),(tu.bitwise_and(tu.load(rs2+ traits::X0, 0),tu.constant((static_cast<uint32_t>(traits:: XLEN)- 1),64)))));
+        	    tu.store(rd + traits::X0,tu.ext((tu.lshr(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),(tu.bitwise_and(tu.load(rs2+ traits::X0, 0),tu.constant((static_cast<uint32_t>(traits:: XLEN)- 1),64))))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1665,7 +1665,7 @@ private:
         pc=pc+ 4;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.write_mem(traits::MEM, static_cast<uint32_t>(traits:: fence), tu.constant(pred<< 4|succ,8));
+        tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fence), tu.constant((uint8_t)pred<< 4|succ,8));
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
         vm_base<ARCH>::gen_sync(tu, POST_SYNC,37);
@@ -1777,11 +1777,11 @@ private:
         else{
         	auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
         	if(rd!= 0){ auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
-        	tu.write_mem(traits::MEM, csr, xrs1);
+        	tu.write_mem(traits::CSR, csr, xrs1);
         	tu.store(rd + traits::X0,xrd);
         	}
         	else{
-        		tu.write_mem(traits::MEM, csr, xrs1);
+        		tu.write_mem(traits::CSR, csr, xrs1);
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -1816,7 +1816,7 @@ private:
         	auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
         	auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
         	if(rs1!= 0) {
-        	    tu.write_mem(traits::MEM, csr, tu.bitwise_or(xrd,xrs1));
+        	    tu.write_mem(traits::CSR, csr, tu.bitwise_or(xrd,xrs1));
         	}
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,xrd);
@@ -1854,7 +1854,7 @@ private:
         	auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
         	auto xrs1 = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
         	if(rs1!= 0) {
-        	    tu.write_mem(traits::MEM, csr, tu.bitwise_and(xrd,tu.logical_neg(xrs1)));
+        	    tu.write_mem(traits::CSR, csr, tu.bitwise_and(xrd,tu.logical_neg(xrs1)));
         	}
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,xrd);
@@ -1890,7 +1890,7 @@ private:
         }
         else{
         	auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
-        	tu.write_mem(traits::MEM, csr, tu.constant((uint32_t)zimm,32));
+        	tu.write_mem(traits::CSR, csr, tu.constant((uint32_t)zimm,32));
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,xrd);
         	}
@@ -1926,7 +1926,7 @@ private:
         else{
         	auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
         	if(zimm!= 0) {
-        	    tu.write_mem(traits::MEM, csr, tu.bitwise_or(xrd,tu.constant((uint32_t)zimm,32)));
+        	    tu.write_mem(traits::CSR, csr, tu.bitwise_or(xrd,tu.constant((uint32_t)zimm,32)));
         	}
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,xrd);
@@ -1963,7 +1963,7 @@ private:
         else{
         	auto xrd = tu.assignment(tu.read_mem(traits::CSR, csr, 32),32);
         	if(zimm!= 0) {
-        	    tu.write_mem(traits::MEM, csr, tu.bitwise_and(xrd,tu.constant(~ ((uint32_t)zimm),32)));
+        	    tu.write_mem(traits::CSR, csr, tu.bitwise_and(xrd,tu.constant(~ ((uint32_t)zimm),32)));
         	}
         	if(rd!= 0) {
         	    tu.store(rd + traits::X0,xrd);
@@ -1994,7 +1994,7 @@ private:
         pc=pc+ 4;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.write_mem(traits::MEM, static_cast<uint32_t>(traits:: fencei), tu.constant(imm,16));
+        tu.write_mem(traits::FENCE, static_cast<uint32_t>(traits:: fencei), tu.constant(imm,16));
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
         vm_base<ARCH>::gen_sync(tu, POST_SYNC,48);
@@ -2024,7 +2024,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto res = tu.assignment(tu.mul(tu.ext(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),64,false),tu.ext(tu.ext(tu.load(rs2+ traits::X0, 0),32,true),64,false)),64);
+        	auto res = tu.assignment(tu.mul(tu.ext(tu.load(rs1+ traits::X0, 0),32,false),tu.ext(tu.load(rs2+ traits::X0, 0),32,false)),64);
         	if(rd!=0) {
         	    tu.store(rd + traits::X0,tu.ext(res,32,true));
         	}
@@ -2058,7 +2058,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto res = tu.assignment(tu.mul(tu.ext(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),64,false),tu.ext(tu.ext(tu.load(rs2+ traits::X0, 0),32,true),64,false)),64);
+        	auto res = tu.assignment(tu.mul(tu.ext(tu.load(rs1+ traits::X0, 0),32,false),tu.ext(tu.load(rs2+ traits::X0, 0),32,false)),64);
         	if(rd!=0) {
         	    tu.store(rd + traits::X0,tu.ext((tu.lshr(res,tu.constant(static_cast<uint32_t>(traits:: XLEN),32))),32,true));
         	}
@@ -2092,7 +2092,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto res = tu.assignment(tu.mul(tu.ext(tu.ext(tu.load(rs1+ traits::X0, 0),32,true),64,false),tu.ext(tu.load(rs2+ traits::X0, 0),64,true)),64);
+        	auto res = tu.assignment(tu.mul(tu.ext(tu.load(rs1+ traits::X0, 0),32,false),tu.load(rs2+ traits::X0, 0)),64);
         	if(rd!=0) {
         	    tu.store(rd + traits::X0,tu.ext((tu.lshr(res,tu.constant(static_cast<uint32_t>(traits:: XLEN),32))),32,true));
         	}
@@ -2126,7 +2126,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto res = tu.assignment(tu.mul(tu.ext(tu.load(rs1+ traits::X0, 0),64,true),tu.ext(tu.load(rs2+ traits::X0, 0),64,true)),64);
+        	auto res = tu.assignment(tu.mul(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)),64);
         	if(rd!=0) {
         	    tu.store(rd + traits::X0,tu.ext((tu.lshr(res,tu.constant(static_cast<uint32_t>(traits:: XLEN),32))),32,true));
         	}
@@ -2162,15 +2162,15 @@ private:
         else{
         	auto dividend = tu.assignment(tu.ext(tu.load(rs1+ traits::X0, 0),32,false),32);
         	auto divisor = tu.assignment(tu.ext(tu.load(rs2+ traits::X0, 0),32,false),32);
-        	if(rd!= 0){ tu.open_if(tu.icmp(ICmpInst::ICMP_NE,divisor,tu.constant( 0,32)));
+        	if(rd!= 0){ tu.open_if(tu.icmp(ICmpInst::ICMP_NE,divisor,tu.constant( 0,8)));
         	auto MMIN = tu.assignment(tu.constant(((uint32_t)1)<<(static_cast<uint32_t>(traits:: XLEN)-1),32),32);
-        	tu.open_if(tu.logical_and(tu.icmp(ICmpInst::ICMP_EQ,tu.load(rs1+ traits::X0, 0),MMIN),tu.icmp(ICmpInst::ICMP_EQ,divisor,tu.constant(- 1,32))));
+        	tu.open_if(tu.logical_and(tu.icmp(ICmpInst::ICMP_EQ,tu.load(rs1+ traits::X0, 0),MMIN),tu.icmp(ICmpInst::ICMP_EQ,divisor,tu.constant(- 1,8))));
         	tu.store(rd + traits::X0,MMIN);
         	tu.open_else();
-        	tu.store(rd + traits::X0,tu.sdiv(dividend,divisor));
+        	tu.store(rd + traits::X0,tu.ext((tu.sdiv(dividend,divisor)),32,true));
         	tu.close_scope();
         	tu.open_else();
-        	tu.store(rd + traits::X0,tu.constant((int32_t)- 1,32));
+        	tu.store(rd + traits::X0,tu.constant((uint32_t)- 1,32));
         	tu.close_scope();
         	}
         }
@@ -2203,13 +2203,13 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs2+ traits::X0, 0),tu.constant( 0,32)));
+        	tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs2+ traits::X0, 0),tu.constant( 0,8)));
         	if(rd!=0) {
-        	    tu.store(rd + traits::X0,tu.sdiv(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.sdiv(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0))),32,true));
         	}
         	tu.open_else();
         	if(rd!=0) {
-        	    tu.store(rd + traits::X0,tu.constant((int32_t)- 1,32));
+        	    tu.store(rd + traits::X0,tu.constant((uint32_t)- 1,32));
         	}
         	tu.close_scope();
         }
@@ -2242,15 +2242,15 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs2+ traits::X0, 0),tu.constant( 0,32)));
-        	auto MMIN = tu.assignment(tu.constant( 1<<(static_cast<uint32_t>(traits:: XLEN)-1),32),32);
-        	tu.open_if(tu.logical_and(tu.icmp(ICmpInst::ICMP_EQ,tu.load(rs1+ traits::X0, 0),MMIN),tu.icmp(ICmpInst::ICMP_EQ,tu.ext(tu.load(rs2+ traits::X0, 0),32,false),tu.constant(- 1,32))));
+        	tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs2+ traits::X0, 0),tu.constant( 0,8)));
+        	auto MMIN = tu.assignment(tu.constant( 1<<(static_cast<uint32_t>(traits:: XLEN)-1),8),32);
+        	tu.open_if(tu.logical_and(tu.icmp(ICmpInst::ICMP_EQ,tu.load(rs1+ traits::X0, 0),MMIN),tu.icmp(ICmpInst::ICMP_EQ,tu.ext(tu.load(rs2+ traits::X0, 0),32,false),tu.constant(- 1,8))));
         	if(rd!=0) {
-        	    tu.store(rd + traits::X0,tu.constant( 0,32));
+        	    tu.store(rd + traits::X0,tu.constant( 0,8));
         	}
         	tu.open_else();
         	if(rd!=0) {
-        	    tu.store(rd + traits::X0,tu.srem(tu.ext(tu.load(rs1+ traits::X0, 0),32,false),tu.ext(tu.load(rs2+ traits::X0, 0),32,false)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.srem(tu.ext(tu.load(rs1+ traits::X0, 0),32,false),tu.ext(tu.load(rs2+ traits::X0, 0),32,false))),32,true));
         	}
         	tu.close_scope();
         	tu.open_else();
@@ -2288,7 +2288,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs2+ traits::X0, 0),tu.constant( 0,32)));
+        	tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs2+ traits::X0, 0),tu.constant( 0,8)));
         	if(rd!=0) {
         	    tu.store(rd + traits::X0,tu.srem(tu.load(rs1+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)));
         	}
@@ -2315,7 +2315,7 @@ private:
             /* generate console output when executing the command */
             auto mnemonic = fmt::format(
                 "{mnemonic:10} {rd}, {imm:#05x}", fmt::arg("mnemonic", "caddi4spn"),
-                fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
+                fmt::arg("rd", name(8+rd)), fmt::arg("imm", imm));
             tu("print_disass(core_ptr, {:#x}, \"{}\");", pc.val, mnemonic);
         }
         auto cur_pc_val = tu.constant(pc.val, traits::reg_bit_widths[traits::PC]);
@@ -2323,7 +2323,7 @@ private:
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
         if(imm) {
-            tu.store(rd+ 8 + traits::X0,tu.add(tu.load(2+ traits::X0, 0),tu.constant(imm,8)));
+            tu.store(rd+ 8 + traits::X0,tu.ext((tu.add(tu.load(2+ traits::X0, 0),tu.constant(imm,8))),32,true));
         }
         else{
         	this->gen_raise_trap(tu, 0,  2);
@@ -2353,8 +2353,8 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        auto load_address = tu.assignment(tu.add(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(uimm,8)),32);
-        tu.store(rd+ 8 + traits::X0,tu.ext(tu.read_mem(traits::MEM, load_address, 32),32,false));
+        auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(uimm,8))),32,true),32);
+        tu.store(rd+ 8 + traits::X0,tu.ext(tu.ext(tu.read_mem(traits::MEM, load_address, 32),32,false),32,true));
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
         vm_base<ARCH>::gen_sync(tu, POST_SYNC,58);
@@ -2380,8 +2380,8 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        auto load_address = tu.assignment(tu.add(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(uimm,8)),32);
-        tu.write_mem(traits::MEM, load_address, tu.ext(tu.load(rs2+ 8+ traits::X0, 0),32,false));
+        auto load_address = tu.assignment(tu.ext((tu.add(tu.load(rs1+ 8+ traits::X0, 0),tu.constant(uimm,8))),32,true),32);
+        tu.write_mem(traits::MEM, load_address, tu.ext(tu.load(rs2+ 8+ traits::X0, 0),32,true));
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
         vm_base<ARCH>::gen_sync(tu, POST_SYNC,59);
@@ -2411,7 +2411,7 @@ private:
         }
         else{
         	if(rs1!= 0) {
-        	    tu.store(rs1 + traits::X0,tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int8_t)sext<6>(imm),8)));
+        	    tu.store(rs1 + traits::X0,tu.ext((tu.add(tu.load(rs1+ traits::X0, 0),tu.constant((int8_t)sext<6>(imm),8))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -2457,8 +2457,8 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.store(1 + traits::X0,tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 2,32)));
-        auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<12>(imm),16)),32);
+        tu.store(1 + traits::X0,tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 2,8))),32,true));
+        auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
         tu.store(traits::NEXT_PC, PC_val_v);
         tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         auto returnValue = std::make_tuple(BRANCH);
@@ -2490,7 +2490,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.constant((int8_t)sext<6>(imm),8));
+        	    tu.store(rd + traits::X0,tu.constant((uint32_t)((int8_t)sext<6>(imm)),32));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -2521,7 +2521,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         if(rd!= 0) {
-            tu.store(rd + traits::X0,tu.constant((int32_t)sext<18>(imm),32));
+            tu.store(rd + traits::X0,tu.constant((uint32_t)((int32_t)sext<18>(imm)),32));
         }
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
@@ -2547,7 +2547,7 @@ private:
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
         if(nzimm) {
-            tu.store(2 + traits::X0,tu.add(tu.load(2+ traits::X0, 0),tu.constant((int16_t)sext<10>(nzimm),16)));
+            tu.store(2 + traits::X0,tu.ext((tu.add(tu.load(2+ traits::X0, 0),tu.constant((int16_t)sext<10>(nzimm),16))),32,true));
         }
         else{
         	this->gen_raise_trap(tu, 0,  2);
@@ -2622,10 +2622,10 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        if(shamt){ tu.store(rs1+ 8 + traits::X0,tu.lshr((tu.ext(tu.load(rs1+ 8+ traits::X0, 0),32,false)),tu.constant(shamt,8)));
+        if(shamt){ tu.store(rs1+ 8 + traits::X0,tu.ext((tu.lshr((tu.ext(tu.load(rs1+ 8+ traits::X0, 0),32,false)),tu.constant(shamt,8))),32,true));
         }
         else{
-        	if(static_cast<uint32_t>(traits:: XLEN)== 128){ tu.store(rs1+ 8 + traits::X0,tu.lshr((tu.ext(tu.load(rs1+ 8+ traits::X0, 0),32,false)),tu.constant( 64,32)));
+        	if(static_cast<uint32_t>(traits:: XLEN)== 128){ tu.store(rs1+ 8 + traits::X0,tu.ext((tu.lshr((tu.ext(tu.load(rs1+ 8+ traits::X0, 0),32,false)),tu.constant( 64,8))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -2652,7 +2652,7 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.store(rs1+ 8 + traits::X0,tu.bitwise_and(tu.load(rs1+ 8+ traits::X0, 0),tu.constant((int8_t)sext<6>(imm),8)));
+        tu.store(rs1+ 8 + traits::X0,tu.ext((tu.bitwise_and(tu.load(rs1+ 8+ traits::X0, 0),tu.constant((int8_t)sext<6>(imm),8))),32,true));
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
         vm_base<ARCH>::gen_sync(tu, POST_SYNC,69);
@@ -2677,7 +2677,7 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.store(rd+ 8 + traits::X0,tu.sub(tu.load(rd+ 8+ traits::X0, 0),tu.load(rs2+ 8+ traits::X0, 0)));
+        tu.store(rd+ 8 + traits::X0,tu.ext((tu.sub(tu.load(rd+ 8+ traits::X0, 0),tu.load(rs2+ 8+ traits::X0, 0))),32,true));
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
         vm_base<ARCH>::gen_sync(tu, POST_SYNC,70);
@@ -2776,7 +2776,7 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<12>(imm),16)),32);
+        auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<12>(imm),16))),32,true),32);
         tu.store(traits::NEXT_PC, PC_val_v);
         tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         auto returnValue = std::make_tuple(BRANCH);
@@ -2803,8 +2803,8 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.open_if(tu.icmp(ICmpInst::ICMP_EQ,tu.load(rs1+ 8+ traits::X0, 0),tu.constant( 0,32)));
-        auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<9>(imm),16)),32);
+        tu.open_if(tu.icmp(ICmpInst::ICMP_EQ,tu.load(rs1+ 8+ traits::X0, 0),tu.constant( 0,8)));
+        auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<9>(imm),16))),32,true),32);
         tu.store(traits::NEXT_PC, PC_val_v);
         tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         tu.close_scope();
@@ -2832,8 +2832,8 @@ private:
         pc=pc+ 2;
         gen_set_pc(tu, pc, traits::NEXT_PC);
         tu.open_scope();
-        tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs1+ 8+ traits::X0, 0),tu.constant( 0,32)));
-        auto PC_val_v = tu.assignment("PC_val", tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<9>(imm),16)),32);
+        tu.open_if(tu.icmp(ICmpInst::ICMP_NE,tu.load(rs1+ 8+ traits::X0, 0),tu.constant( 0,8)));
+        auto PC_val_v = tu.assignment("PC_val", tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant((int16_t)sext<9>(imm),16))),32,true),32);
         tu.store(traits::NEXT_PC, PC_val_v);
         tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
         tu.close_scope();
@@ -2897,8 +2897,9 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto res = tu.assignment(tu.read_mem(traits::MEM, tu.add(tu.load(2+ traits::X0, 0),tu.constant(uimm,8)), 32),32);
-        	tu.store(rd + traits::X0,tu.ext(res,32,false));
+        	auto offs = tu.assignment(tu.ext((tu.add(tu.load(2+ traits::X0, 0),tu.constant(uimm,8))),32,true),32);
+        	auto res = tu.assignment(tu.ext(tu.read_mem(traits::MEM, offs, 32),32,false),32);
+        	tu.store(rd + traits::X0,tu.ext(res,32,true));
         }
         auto returnValue = std::make_tuple(CONT);
         tu.close_scope();
@@ -3012,7 +3013,7 @@ private:
         }
         else{
         	if(rd!= 0) {
-        	    tu.store(rd + traits::X0,tu.add(tu.load(rd+ traits::X0, 0),tu.load(rs2+ traits::X0, 0)));
+        	    tu.store(rd + traits::X0,tu.ext((tu.add(tu.load(rd+ traits::X0, 0),tu.load(rs2+ traits::X0, 0))),32,true));
         	}
         }
         auto returnValue = std::make_tuple(CONT);
@@ -3043,7 +3044,7 @@ private:
         }
         else{
         	auto new_pc = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
-        	tu.store(1 + traits::X0,tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 2,32)));
+        	tu.store(1 + traits::X0,tu.ext((tu.add(tu.ext(cur_pc_val,32,false),tu.constant( 2,8))),32,true));
         	auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(new_pc,tu.constant(~ 0x1,8)),32);
         	tu.store(traits::NEXT_PC, PC_val_v);
         	tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
@@ -3096,7 +3097,7 @@ private:
             this->gen_raise_trap(tu, 0,  2);
         }
         else{
-        	auto offs = tu.assignment(tu.add(tu.load(2+ traits::X0, 0),tu.constant(uimm,8)),32);
+        	auto offs = tu.assignment(tu.ext((tu.add(tu.load(2+ traits::X0, 0),tu.constant(uimm,8))),32,true),32);
         	tu.write_mem(traits::MEM, offs, tu.ext(tu.load(rs2+ traits::X0, 0),32,true));
         }
         auto returnValue = std::make_tuple(CONT);