From 52ed8b81a6039ee6819cd8b7b5c9a6c773755add Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Mon, 30 May 2022 14:08:02 +0200 Subject: [PATCH] fixed template to work with previous code generator --- gen_input/templates/interp/CORENAME.cpp.gtl | 7 +- src/vm/interp/vm_tgc_c.cpp | 950 ++++++++++---------- 2 files changed, 478 insertions(+), 479 deletions(-) diff --git a/gen_input/templates/interp/CORENAME.cpp.gtl b/gen_input/templates/interp/CORENAME.cpp.gtl index c643699..6041e9b 100644 --- a/gen_input/templates/interp/CORENAME.cpp.gtl +++ b/gen_input/templates/interp/CORENAME.cpp.gtl @@ -314,8 +314,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co <%}}%>// calculate next pc value *NEXT_PC = *PC + ${instr.length/8}; // execute instruction - <%instr.behavior.eachLine{%>${it} - <%}%>TRAP_${instr.name}:break; + try { + <%instr.behavior.eachLine{%>${it} + <%}%> + } catch(...){} + TRAP_${instr.name}:break; }// @suppress("No break at end of case")<%}%> default: { *NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2); diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp index b219e2e..9866654 100644 --- a/src/vm/interp/vm_tgc_c.cpp +++ b/src/vm/interp/vm_tgc_c.cpp @@ -396,11 +396,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (int32_t)imm; - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int32_t)imm; + + } catch(...){} TRAP_LUI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::AUIPC: { @@ -418,11 +417,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *PC + (int32_t)imm; - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *PC + (int32_t)imm; + + } catch(...){} TRAP_AUIPC:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::JAL: { @@ -440,18 +438,18 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if(imm % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *PC + 4; - } - *NEXT_PC = *PC + (int32_t)sext<21>(imm); - super::ex_info.branch_taken=true; + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *PC + 4; + pc_assign(*NEXT_PC) = *PC + (int32_t)sext<21>(imm); } } + + } catch(...){} TRAP_JAL:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::JALR: { @@ -470,19 +468,19 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { int32_t new_pc = (*(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm)) & ~ 1; if(new_pc % traits::INSTR_ALIGNMENT) { raise(0, 0); } else { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *PC + 4; - } - *NEXT_PC = new_pc & ~ 0x1; - super::ex_info.branch_taken=true; + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *PC + 4; + pc_assign(*NEXT_PC) = new_pc & ~ 0x1; } } + + } catch(...){} TRAP_JALR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::BEQ: { @@ -501,17 +499,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(*(X+rs1 % traits::RFS) == *(X+rs2 % traits::RFS)) { - if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); - } - else { - *NEXT_PC = *PC + (int16_t)sext<13>(imm); - super::ex_info.branch_taken=true; - } + try { + { + if(*(X+rs1 % traits::RFS) == *(X+rs2 % traits::RFS)) if(imm % traits::INSTR_ALIGNMENT) { + raise(0, 0); + } + else { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); } } + + } catch(...){} TRAP_BEQ:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::BNE: { @@ -530,17 +528,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(*(X+rs1 % traits::RFS) != *(X+rs2 % traits::RFS)) { - if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); - } - else { - *NEXT_PC = *PC + (int16_t)sext<13>(imm); - super::ex_info.branch_taken=true; - } + try { + { + if(*(X+rs1 % traits::RFS) != *(X+rs2 % traits::RFS)) if(imm % traits::INSTR_ALIGNMENT) { + raise(0, 0); + } + else { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); } } + + } catch(...){} TRAP_BNE:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::BLT: { @@ -559,17 +557,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((int32_t)*(X+rs1 % traits::RFS) < (int32_t)*(X+rs2 % traits::RFS)) { - if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); - } - else { - *NEXT_PC = *PC + (int16_t)sext<13>(imm); - super::ex_info.branch_taken=true; - } + try { + { + if((int32_t)*(X+rs1 % traits::RFS) < (int32_t)*(X+rs2 % traits::RFS)) if(imm % traits::INSTR_ALIGNMENT) { + raise(0, 0); + } + else { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); } } + + } catch(...){} TRAP_BLT:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::BGE: { @@ -588,17 +586,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((int32_t)*(X+rs1 % traits::RFS) >= (int32_t)*(X+rs2 % traits::RFS)) { - if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); - } - else { - *NEXT_PC = *PC + (int16_t)sext<13>(imm); - super::ex_info.branch_taken=true; - } + try { + { + if((int32_t)*(X+rs1 % traits::RFS) >= (int32_t)*(X+rs2 % traits::RFS)) if(imm % traits::INSTR_ALIGNMENT) { + raise(0, 0); + } + else { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); } } + + } catch(...){} TRAP_BGE:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::BLTU: { @@ -617,17 +615,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(*(X+rs1 % traits::RFS) < *(X+rs2 % traits::RFS)) { - if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); - } - else { - *NEXT_PC = *PC + (int16_t)sext<13>(imm); - super::ex_info.branch_taken=true; - } + try { + { + if(*(X+rs1 % traits::RFS) < *(X+rs2 % traits::RFS)) if(imm % traits::INSTR_ALIGNMENT) { + raise(0, 0); + } + else { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); } } + + } catch(...){} TRAP_BLTU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::BGEU: { @@ -646,17 +644,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(*(X+rs1 % traits::RFS) >= *(X+rs2 % traits::RFS)) { - if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); - } - else { - *NEXT_PC = *PC + (int16_t)sext<13>(imm); - super::ex_info.branch_taken=true; - } + try { + { + if(*(X+rs1 % traits::RFS) >= *(X+rs2 % traits::RFS)) if(imm % traits::INSTR_ALIGNMENT) { + raise(0, 0); + } + else { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); } } + + } catch(...){} TRAP_BGEU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::LB: { @@ -675,13 +673,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - int8_t res = (int8_t)super::template read_mem(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm)); - if(this->core.trap_state) goto TRAP_LB; - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = res; - } + try { + { + int8_t res = (int8_t)readSpace1(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm)); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = res; } + + } catch(...){} TRAP_LB:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::LH: { @@ -700,14 +698,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { uint32_t load_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); - int16_t res = (int16_t)super::template read_mem(traits::MEM, load_address); - if(this->core.trap_state) goto TRAP_LH; - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = res; - } + int16_t res = (int16_t)readSpace2(traits::MEM, load_address); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = res; } + + } catch(...){} TRAP_LH:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::LW: { @@ -726,14 +724,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { uint32_t load_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); - int32_t res = (int32_t)super::template read_mem(traits::MEM, load_address); - if(this->core.trap_state) goto TRAP_LW; - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (uint32_t)res; - } + int32_t res = (int32_t)readSpace4(traits::MEM, load_address); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (uint32_t)res; } + + } catch(...){} TRAP_LW:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::LBU: { @@ -752,13 +750,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - uint8_t res = (uint8_t)super::template read_mem(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm)); - if(this->core.trap_state) goto TRAP_LBU; - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = res; - } + try { + { + uint8_t res = (uint8_t)readSpace1(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm)); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = res; } + + } catch(...){} TRAP_LBU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::LHU: { @@ -777,14 +775,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { uint32_t load_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); - uint16_t res = (uint16_t)super::template read_mem(traits::MEM, load_address); - if(this->core.trap_state) goto TRAP_LHU; - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = res; - } + uint16_t res = (uint16_t)readSpace2(traits::MEM, load_address); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = res; } + + } catch(...){} TRAP_LHU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SB: { @@ -803,10 +801,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - super::template write_mem(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm), (int8_t)*(X+rs2 % traits::RFS)); - if(this->core.trap_state) goto TRAP_SB; - } + try { + writeSpace1(traits::MEM, *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm), (int8_t)*(X+rs2 % traits::RFS)); + + } catch(...){} TRAP_SB:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SH: { @@ -825,11 +823,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { uint32_t store_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); - super::template write_mem(traits::MEM, store_address, (int16_t)*(X+rs2 % traits::RFS)); - if(this->core.trap_state) goto TRAP_SH; + writeSpace2(traits::MEM, store_address, (int16_t)*(X+rs2 % traits::RFS)); } + + } catch(...){} TRAP_SH:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SW: { @@ -848,11 +848,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { uint32_t store_address = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); - super::template write_mem(traits::MEM, store_address, *(X+rs2 % traits::RFS)); - if(this->core.trap_state) goto TRAP_SW; + writeSpace4(traits::MEM, store_address, *(X+rs2 % traits::RFS)); } + + } catch(...){} TRAP_SW:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::ADDI: { @@ -871,11 +873,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) + (int16_t)sext<12>(imm); + + } catch(...){} TRAP_ADDI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SLTI: { @@ -894,11 +895,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) < (int16_t)sext<12>(imm)? 1 : 0; - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) < (int16_t)sext<12>(imm)? 1 : 0; + + } catch(...){} TRAP_SLTI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SLTIU: { @@ -917,11 +917,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (*(X+rs1 % traits::RFS) < (uint32_t)((int16_t)sext<12>(imm)))? 1 : 0; - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (*(X+rs1 % traits::RFS) < (uint32_t)((int16_t)sext<12>(imm)))? 1 : 0; + + } catch(...){} TRAP_SLTIU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::XORI: { @@ -940,11 +939,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) ^ (int16_t)sext<12>(imm); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) ^ (int16_t)sext<12>(imm); + + } catch(...){} TRAP_XORI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::ORI: { @@ -963,11 +961,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) | (int16_t)sext<12>(imm); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) | (int16_t)sext<12>(imm); + + } catch(...){} TRAP_ORI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::ANDI: { @@ -986,11 +983,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) & (int16_t)sext<12>(imm); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) & (int16_t)sext<12>(imm); + + } catch(...){} TRAP_ANDI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SLLI: { @@ -1009,16 +1005,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(shamt > 31) { - raise(0, 0); - } - else { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) << shamt; - } - } - } + try { + if(shamt > 31) { + raise(0, 0); + } + else { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) << shamt; + } + + } catch(...){} TRAP_SLLI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SRLI: { @@ -1037,16 +1032,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(shamt > 31) { - raise(0, 0); - } - else { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) >> shamt; - } - } - } + try { + if(shamt > 31) { + raise(0, 0); + } + else { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) >> shamt; + } + + } catch(...){} TRAP_SRLI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SRAI: { @@ -1065,16 +1059,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(shamt > 31) { - raise(0, 0); - } - else { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) >> shamt; - } - } - } + try { + if(shamt > 31) { + raise(0, 0); + } + else { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) >> shamt; + } + + } catch(...){} TRAP_SRAI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::ADD: { @@ -1093,11 +1086,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) + *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) + *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_ADD:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SUB: { @@ -1116,11 +1108,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) - *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) - *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_SUB:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SLL: { @@ -1139,11 +1130,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) << (*(X+rs2 % traits::RFS) & (traits::XLEN - 1)); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) << (*(X+rs2 % traits::RFS) & (traits::XLEN - 1)); + + } catch(...){} TRAP_SLL:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SLT: { @@ -1162,11 +1152,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) < (int32_t)*(X+rs2 % traits::RFS)? 1 : 0; - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) < (int32_t)*(X+rs2 % traits::RFS)? 1 : 0; + + } catch(...){} TRAP_SLT:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SLTU: { @@ -1185,11 +1174,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (uint32_t)*(X+rs1 % traits::RFS) < (uint32_t)*(X+rs2 % traits::RFS)? 1 : 0; - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (uint32_t)*(X+rs1 % traits::RFS) < (uint32_t)*(X+rs2 % traits::RFS)? 1 : 0; + + } catch(...){} TRAP_SLTU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::XOR: { @@ -1208,11 +1196,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) ^ *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) ^ *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_XOR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SRL: { @@ -1231,11 +1218,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) >> (*(X+rs2 % traits::RFS) & (traits::XLEN - 1)); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) >> (*(X+rs2 % traits::RFS) & (traits::XLEN - 1)); + + } catch(...){} TRAP_SRL:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SRA: { @@ -1254,11 +1240,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) >> (*(X+rs2 % traits::RFS) & (traits::XLEN - 1)); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) >> (*(X+rs2 % traits::RFS) & (traits::XLEN - 1)); + + } catch(...){} TRAP_SRA:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::OR: { @@ -1277,11 +1262,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) | *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) | *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_OR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::AND: { @@ -1300,11 +1284,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) & *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) & *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_AND:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::FENCE: { @@ -1324,10 +1307,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - super::template write_mem(traits::FENCE, traits::fence, pred << 4 | succ); - if(this->core.trap_state) goto TRAP_FENCE; - } + try { + writeSpace1(traits::FENCE, traits::fence, pred << 4 | succ); + + } catch(...){} TRAP_FENCE:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::ECALL: { @@ -1339,9 +1322,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - raise(0, 11); - } + try { + raise(0, 11); + + } catch(...){} TRAP_ECALL:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::EBREAK: { @@ -1353,9 +1337,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - raise(0, 3); - } + try { + raise(0, 3); + + } catch(...){} TRAP_EBREAK:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::URET: { @@ -1367,9 +1352,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - leave(0); - } + try { + leave(0); + + } catch(...){} TRAP_URET:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::SRET: { @@ -1381,9 +1367,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - leave(1); - } + try { + leave(1); + + } catch(...){} TRAP_SRET:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::MRET: { @@ -1395,9 +1382,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - leave(3); - } + try { + leave(3); + + } catch(...){} TRAP_MRET:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::WFI: { @@ -1409,9 +1397,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - wait(1); - } + try { + wait(1); + + } catch(...){} TRAP_WFI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::DRET: { @@ -1427,16 +1416,16 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - if(*PRIV < 4) { - raise(0, 2); - } + try { + { + if(*PRIV < 4) raise(0, 2); else { - *NEXT_PC = *DPC; - super::ex_info.branch_taken=true; + pc_assign(*NEXT_PC) = *DPC; *PRIV &= 0x3; } } + + } catch(...){} TRAP_DRET:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRRW: { @@ -1455,20 +1444,20 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { uint32_t xrs1 = *(X+rs1 % traits::RFS); if((rd % traits::RFS) != 0) { - uint32_t xrd = super::template read_mem(traits::CSR, csr); - if(this->core.trap_state) goto TRAP_CSRRW; - super::template write_mem(traits::CSR, csr, xrs1); - if(this->core.trap_state) goto TRAP_CSRRW; + uint32_t xrd = readSpace4(traits::CSR, csr); + writeSpace4(traits::CSR, csr, xrs1); *(X+rd % traits::RFS) = xrd; } else { - super::template write_mem(traits::CSR, csr, xrs1); - if(this->core.trap_state) goto TRAP_CSRRW; + writeSpace4(traits::CSR, csr, xrs1); } } + + } catch(...){} TRAP_CSRRW:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRRS: { @@ -1487,18 +1476,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - uint32_t xrd = super::template read_mem(traits::CSR, csr); - if(this->core.trap_state) goto TRAP_CSRRS; + try { + { + uint32_t xrd = readSpace4(traits::CSR, csr); uint32_t xrs1 = *(X+rs1 % traits::RFS); - if(rs1 != 0) { - super::template write_mem(traits::CSR, csr, xrd | xrs1); - if(this->core.trap_state) goto TRAP_CSRRS; - } - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = xrd; - } + if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd | xrs1); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = xrd; } + + } catch(...){} TRAP_CSRRS:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRRC: { @@ -1517,18 +1503,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - uint32_t xrd = super::template read_mem(traits::CSR, csr); - if(this->core.trap_state) goto TRAP_CSRRC; + try { + { + uint32_t xrd = readSpace4(traits::CSR, csr); uint32_t xrs1 = *(X+rs1 % traits::RFS); - if(rs1 != 0) { - super::template write_mem(traits::CSR, csr, xrd & ~ xrs1); - if(this->core.trap_state) goto TRAP_CSRRC; - } - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = xrd; - } + if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd & ~ xrs1); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = xrd; } + + } catch(...){} TRAP_CSRRC:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRRWI: { @@ -1547,15 +1530,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - uint32_t xrd = super::template read_mem(traits::CSR, csr); - if(this->core.trap_state) goto TRAP_CSRRWI; - super::template write_mem(traits::CSR, csr, (uint32_t)zimm); - if(this->core.trap_state) goto TRAP_CSRRWI; - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = xrd; - } + try { + { + uint32_t xrd = readSpace4(traits::CSR, csr); + writeSpace4(traits::CSR, csr, (uint32_t)zimm); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = xrd; } + + } catch(...){} TRAP_CSRRWI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRRSI: { @@ -1574,17 +1556,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - uint32_t xrd = super::template read_mem(traits::CSR, csr); - if(this->core.trap_state) goto TRAP_CSRRSI; - if(zimm != 0) { - super::template write_mem(traits::CSR, csr, xrd | (uint32_t)zimm); - if(this->core.trap_state) goto TRAP_CSRRSI; - } - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = xrd; - } + try { + { + uint32_t xrd = readSpace4(traits::CSR, csr); + if(zimm != 0) writeSpace4(traits::CSR, csr, xrd | (uint32_t)zimm); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = xrd; } + + } catch(...){} TRAP_CSRRSI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRRCI: { @@ -1603,17 +1582,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - uint32_t xrd = super::template read_mem(traits::CSR, csr); - if(this->core.trap_state) goto TRAP_CSRRCI; - if(zimm != 0) { - super::template write_mem(traits::CSR, csr, xrd & ~ ((uint32_t)zimm)); - if(this->core.trap_state) goto TRAP_CSRRCI; - } - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = xrd; - } + try { + { + uint32_t xrd = readSpace4(traits::CSR, csr); + if(zimm != 0) writeSpace4(traits::CSR, csr, xrd & ~ ((uint32_t)zimm)); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = xrd; } + + } catch(...){} TRAP_CSRRCI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::FENCE_I: { @@ -1631,10 +1607,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { - super::template write_mem(traits::FENCE, traits::fencei, imm); - if(this->core.trap_state) goto TRAP_FENCE_I; - } + try { + writeSpace2(traits::FENCE, traits::fencei, imm); + + } catch(...){} TRAP_FENCE_I:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::MUL: { @@ -1653,12 +1629,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { int64_t res = (int64_t)(int32_t)*(X+rs1 % traits::RFS) * (int64_t)(int32_t)*(X+rs2 % traits::RFS); *(X+rd % traits::RFS) = (uint32_t)res; } } + + } catch(...){} TRAP_MUL:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::MULH: { @@ -1677,12 +1656,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { int64_t res = (int64_t)(int32_t)*(X+rs1 % traits::RFS) * (int64_t)(int32_t)*(X+rs2 % traits::RFS); *(X+rd % traits::RFS) = (uint32_t)(res >> traits::XLEN); } } + + } catch(...){} TRAP_MULH:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::MULHSU: { @@ -1701,12 +1683,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { int64_t res = (int64_t)(int32_t)*(X+rs1 % traits::RFS) * (uint64_t)*(X+rs2 % traits::RFS); *(X+rd % traits::RFS) = (uint32_t)(res >> traits::XLEN); } } + + } catch(...){} TRAP_MULHSU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::MULHU: { @@ -1725,12 +1710,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { uint64_t res = (uint64_t)*(X+rs1 % traits::RFS) * (uint64_t)*(X+rs2 % traits::RFS); *(X+rd % traits::RFS) = (uint32_t)(res >> traits::XLEN); } } + + } catch(...){} TRAP_MULHU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::DIV: { @@ -1749,22 +1737,19 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { if(*(X+rs2 % traits::RFS) != 0) { uint32_t MMIN = 1 << (traits::XLEN - 1); - if(*(X+rs1 % traits::RFS) == MMIN && (int32_t)*(X+rs2 % traits::RFS) == - 1) { - *(X+rd % traits::RFS) = MMIN; - } - else { - *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) / (int32_t)*(X+rs2 % traits::RFS); - } - } - else { - *(X+rd % traits::RFS) = - 1; + if(*(X+rs1 % traits::RFS) == MMIN && (int32_t)*(X+rs2 % traits::RFS) == - 1) *(X+rd % traits::RFS) = MMIN; + else *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) / (int32_t)*(X+rs2 % traits::RFS); } + else *(X+rd % traits::RFS) = - 1; } } + + } catch(...){} TRAP_DIV:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::DIVU: { @@ -1783,16 +1768,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { - if(*(X+rs2 % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) / *(X+rs2 % traits::RFS); - } - else { - *(X+rd % traits::RFS) = - 1; - } + if(*(X+rs2 % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) / *(X+rs2 % traits::RFS); + else *(X+rd % traits::RFS) = - 1; } } + + } catch(...){} TRAP_DIVU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::REM: { @@ -1811,22 +1795,19 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { if(*(X+rs2 % traits::RFS) != 0) { uint32_t MMIN = 1 << (traits::XLEN - 1); - if(*(X+rs1 % traits::RFS) == MMIN && (int32_t)*(X+rs2 % traits::RFS) == - 1) { - *(X+rd % traits::RFS) = 0; - } - else { - *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) % (int32_t)*(X+rs2 % traits::RFS); - } - } - else { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS); + if(*(X+rs1 % traits::RFS) == MMIN && (int32_t)*(X+rs2 % traits::RFS) == - 1) *(X+rd % traits::RFS) = 0; + else *(X+rd % traits::RFS) = (int32_t)*(X+rs1 % traits::RFS) % (int32_t)*(X+rs2 % traits::RFS); } + else *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS); } } + + } catch(...){} TRAP_REM:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::REMU: { @@ -1845,16 +1826,15 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction - { + try { + { if((rd % traits::RFS) != 0) { - if(*(X+rs2 % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) % *(X+rs2 % traits::RFS); - } - else { - *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS); - } + if(*(X+rs2 % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS) % *(X+rs2 % traits::RFS); + else *(X+rd % traits::RFS) = *(X+rs1 % traits::RFS); } } + + } catch(...){} TRAP_REMU:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CADDI4SPN: { @@ -1872,14 +1852,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(imm) { - *(X+rd + 8) = *(X+2) + imm; - } - else { - raise(0, 2); - } - } + try { + if(imm) *(X+rd + 8) = *(X+2) + imm; + else raise(0, 2); + + } catch(...){} TRAP_CADDI4SPN:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CLW: { @@ -1898,11 +1875,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint32_t load_address = *(X+rs1 + 8) + uimm; - *(X+rd + 8) = (int32_t)super::template read_mem(traits::MEM, load_address); - if(this->core.trap_state) goto TRAP_CLW; + *(X+rd + 8) = (int32_t)readSpace4(traits::MEM, load_address); } + + } catch(...){} TRAP_CLW:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSW: { @@ -1921,11 +1900,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint32_t load_address = *(X+rs1 + 8) + uimm; - super::template write_mem(traits::MEM, load_address, *(X+rs2 + 8)); - if(this->core.trap_state) goto TRAP_CSW; + writeSpace4(traits::MEM, load_address, *(X+rs2 + 8)); } + + } catch(...){} TRAP_CSW:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CADDI: { @@ -1943,9 +1924,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - *(X+rs1 % traits::RFS) = *(X+rs1 % traits::RFS) + (int8_t)sext<6>(imm); - } + try { + *(X+rs1 % traits::RFS) = *(X+rs1 % traits::RFS) + (int8_t)sext<6>(imm); + + } catch(...){} TRAP_CADDI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CNOP: { @@ -1958,8 +1940,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { } + + } catch(...){} TRAP_CNOP:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CJAL: { @@ -1976,11 +1961,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { *(X+1) = *PC + 2; - *NEXT_PC = *PC + (int16_t)sext<12>(imm); - super::ex_info.branch_taken=true; + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<12>(imm); } + + } catch(...){} TRAP_CJAL:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CLI: { @@ -1998,11 +1985,12 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd) = (uint32_t)(int8_t)sext<1>(imm); - } + try { + { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int8_t)sext<6>(imm); } + + } catch(...){} TRAP_CLI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CLUI: { @@ -2020,14 +2008,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(imm == 0) { - raise(0, 2); - } - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = (int32_t)sext<18>(imm); - } + try { + { + if(imm == 0) raise(0, 2); + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = (int32_t)sext<18>(imm); } + + } catch(...){} TRAP_CLUI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CADDI16SP: { @@ -2044,14 +2031,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(nzimm) { - *(X+2) = *(X+2) + (int16_t)sext<10>(nzimm); - } - else { - raise(0, 2); - } - } + try { + if(nzimm) *(X+2) = *(X+2) + (int16_t)sext<10>(nzimm); + else raise(0, 2); + + } catch(...){} TRAP_CADDI16SP:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::__reserved_clui: { @@ -2064,9 +2048,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - raise(0, 2); - } + try { + raise(0, 2); + + } catch(...){} TRAP___reserved_clui:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRLI: { @@ -2084,10 +2069,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint8_t rs1_idx = rs1 + 8; *(X+rs1_idx) = *(X+rs1_idx) >> shamt; } + + } catch(...){} TRAP_CSRLI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSRAI: { @@ -2105,18 +2093,17 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(shamt) { - uint8_t rs1_idx = rs1 + 8; - *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> shamt; - } - else { - if(traits::XLEN == 128) { - uint8_t rs1_idx = rs1 + 8; - *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> 64; - } - } - } + try { + if(shamt) { + uint8_t rs1_idx = rs1 + 8; + *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> shamt; + } + else if(traits::XLEN == 128) { + uint8_t rs1_idx = rs1 + 8; + *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> 64; + } + + } catch(...){} TRAP_CSRAI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CANDI: { @@ -2134,10 +2121,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint8_t rs1_idx = rs1 + 8; *(X+rs1_idx) = *(X+rs1_idx) & (int8_t)sext<6>(imm); } + + } catch(...){} TRAP_CANDI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSUB: { @@ -2155,10 +2145,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint8_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) - *(X+rs2 + 8); } + + } catch(...){} TRAP_CSUB:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CXOR: { @@ -2176,10 +2169,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint8_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) ^ *(X+rs2 + 8); } + + } catch(...){} TRAP_CXOR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::COR: { @@ -2197,10 +2193,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint8_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) | *(X+rs2 + 8); } + + } catch(...){} TRAP_COR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CAND: { @@ -2218,10 +2217,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint8_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) & *(X+rs2 + 8); } + + } catch(...){} TRAP_CAND:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CJ: { @@ -2237,10 +2239,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - *NEXT_PC = *PC + (int16_t)sext<12>(imm); - super::ex_info.branch_taken=true; - } + try { + pc_assign(*NEXT_PC) = *PC + (int16_t)sext<12>(imm); + + } catch(...){} TRAP_CJ:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CBEQZ: { @@ -2258,12 +2260,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(*(X+rs1 + 8) == 0) { - *NEXT_PC = *PC + (int16_t)sext<9>(imm); - super::ex_info.branch_taken=true; - } - } + try { + if(*(X+rs1 + 8) == 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); + + } catch(...){} TRAP_CBEQZ:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CBNEZ: { @@ -2281,12 +2281,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(*(X+rs1 + 8) != 0) { - *NEXT_PC = *PC + (int16_t)sext<9>(imm); - super::ex_info.branch_taken=true; - } - } + try { + if(*(X+rs1 + 8) != 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); + + } catch(...){} TRAP_CBNEZ:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSLLI: { @@ -2304,11 +2302,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(nzuimm) { - *(X+rs1 % traits::RFS) = *(X+rs1 % traits::RFS) << nzuimm; - } - } + try { + if(nzuimm) *(X+rs1 % traits::RFS) = *(X+rs1 % traits::RFS) << nzuimm; + + } catch(...){} TRAP_CSLLI:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CLWSP: { @@ -2326,16 +2323,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(rd) { - uint32_t offs = *(X+2) + uimm; - *(X+rd % traits::RFS) = (int32_t)super::template read_mem(traits::MEM, offs); - if(this->core.trap_state) goto TRAP_CLWSP; - } - else { - raise(0, 2); - } - } + try { + if(rd) { + uint32_t offs = *(X+2) + uimm; + *(X+rd % traits::RFS) = (int32_t)readSpace4(traits::MEM, offs); + } + else raise(0, 2); + + } catch(...){} TRAP_CLWSP:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CMV: { @@ -2353,11 +2348,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_CMV:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CJR: { @@ -2374,15 +2368,11 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if(rs1) { - *NEXT_PC = *(X+rs1 % traits::RFS) & ~ 0x1; - super::ex_info.branch_taken=true; - } - else { - raise(0, 2); - } - } + try { + if(rs1) pc_assign(*NEXT_PC) = *(X+rs1 % traits::RFS) & ~ 0x1; + else raise(0, 2); + + } catch(...){} TRAP_CJR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::__reserved_cmv: { @@ -2394,9 +2384,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - raise(0, 2); - } + try { + raise(0, 2); + + } catch(...){} TRAP___reserved_cmv:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CADD: { @@ -2414,11 +2405,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - if((rd % traits::RFS) != 0) { - *(X+rd % traits::RFS) = *(X+rd % traits::RFS) + *(X+rs2 % traits::RFS); - } - } + try { + if((rd % traits::RFS) != 0) *(X+rd % traits::RFS) = *(X+rd % traits::RFS) + *(X+rs2 % traits::RFS); + + } catch(...){} TRAP_CADD:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CJALR: { @@ -2435,12 +2425,14 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { int32_t new_pc = *(X+rs1 % traits::RFS); *(X+1) = *PC + 2; - *NEXT_PC = new_pc & ~ 0x1; - super::ex_info.branch_taken=true; + pc_assign(*NEXT_PC) = new_pc & ~ 0x1; } + + } catch(...){} TRAP_CJALR:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CEBREAK: { @@ -2452,9 +2444,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - raise(0, 3); - } + try { + raise(0, 3); + + } catch(...){} TRAP_CEBREAK:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::CSWSP: { @@ -2472,11 +2465,13 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co auto* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { + try { + { uint32_t offs = *(X+2) + uimm; - super::template write_mem(traits::MEM, offs, (uint32_t)*(X+rs2 % traits::RFS)); - if(this->core.trap_state) goto TRAP_CSWSP; + writeSpace4(traits::MEM, offs, (uint32_t)*(X+rs2 % traits::RFS)); } + + } catch(...){} TRAP_CSWSP:break; }// @suppress("No break at end of case") case arch::traits::opcode_e::DII: { @@ -2488,9 +2483,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction - { - raise(0, 2); - } + try { + raise(0, 2); + + } catch(...){} TRAP_DII:break; }// @suppress("No break at end of case") default: {