From 4b3f5a6b0c740099b4342c3ee924cb7ebad463c6 Mon Sep 17 00:00:00 2001
From: Eyck Jentzsch <eyck@minres.com>
Date: Sun, 16 May 2021 16:44:30 +0200
Subject: [PATCH] add missing change

---
 src/main.cpp | 53 ++++++++++++++++++++++++----------------------------
 1 file changed, 24 insertions(+), 29 deletions(-)

diff --git a/src/main.cpp b/src/main.cpp
index 173d67c..517d9bf 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -31,18 +31,23 @@
  *******************************************************************************/
 
 #include <iostream>
-#include <iss/iss.h>
+#include <iss/factory.h>
 
 #include <boost/lexical_cast.hpp>
 #include <boost/program_options.hpp>
 #include <iss/arch/riscv_hart_m_p.h>
-#ifdef CORE_TGC_C
+#include "iss/arch/riscv_hart_m_p.h"
 #include "iss/arch/tgc_c.h"
-using core_type = iss::arch::tgc_c;
+using tgc_c_plat_type = iss::arch::riscv_hart_m_p<iss::arch::tgc_c>;
+#ifdef CORE_TGC_B
+#include "iss/arch/riscv_hart_m_p.h"
+#include "iss/arch/tgc_b.h"
+using tgc_b_plat_type = iss::arch::riscv_hart_m_p<iss::arch::tgc_b>;
 #endif
 #ifdef CORE_TGC_D
+#include "iss/arch/riscv_hart_mu_p.h"
 #include "iss/arch/tgc_d.h"
-using core_type = iss::arch::tgc_d;
+using tgc_d_plat_type = iss::arch::riscv_hart_mu_p<iss::arch::tgc_d>;
 #endif
 #ifdef WITH_LLVM
 #include <iss/llvm/jit_helper.h>
@@ -53,23 +58,6 @@ using core_type = iss::arch::tgc_d;
 
 namespace po = boost::program_options;
 
-using cpu_ptr = std::unique_ptr<iss::arch_if>;
-using vm_ptr= std::unique_ptr<iss::vm_if>;
-
-template<typename CORE>
-std::tuple<cpu_ptr, vm_ptr> create_cpu(std::string const& backend, unsigned gdb_port){
-    CORE* lcpu = new iss::arch::riscv_hart_m_p<CORE>();
-    if(backend == "interp")
-        return {cpu_ptr{lcpu}, vm_ptr{iss::interp::create(lcpu, gdb_port)}};
-#ifdef WITH_LLVM
-    if(backend == "llvm")
-        return {cpu_ptr{lcpu}, vm_ptr{iss::llvm::create(lcpu, gdb_port)}};
-#endif
-//    if(backend == "tcc")
-//        return {cpu_ptr{lcpu}, vm_ptr{iss::tcc::create(lcpu, gdb_port)}};
-    return {nullptr, nullptr};
-}
-
 int main(int argc, char *argv[]) {
     /*
      *  Define and parse the program options
@@ -132,19 +120,26 @@ int main(int argc, char *argv[]) {
 #endif
         bool dump = clim.count("dump-ir");
         // instantiate the simulator
-        vm_ptr vm{nullptr};
-        cpu_ptr cpu{nullptr};
+        iss::vm_ptr vm{nullptr};
+        iss::cpu_ptr cpu{nullptr};
         std::string isa_opt(clim["isa"].as<std::string>());
-#ifdef WITH_TGF_B
+        if (isa_opt == "tgf_c") {
+            std::tie(cpu, vm) =
+                iss::create_cpu<tgc_c_plat_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
+        } else
+#ifdef CORE_TGC_B
         if (isa_opt == "tgf_b") {
             std::tie(cpu, vm) =
-                create_cpu<iss::arch::tgf_b>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
+                iss::create_cpu<tgc_b_plat_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
         } else
 #endif
-            if (isa_opt == "tgf_c") {
+#ifdef CORE_TGC_D
+        if (isa_opt == "tgf_d") {
             std::tie(cpu, vm) =
-                create_cpu<core_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
-        } else {
+                iss::create_cpu<tgc_d_plat_type>(clim["backend"].as<std::string>(), clim["gdb-port"].as<unsigned>());
+        } else
+#endif
+        {
             LOG(ERROR) << "Illegal argument value for '--isa': " << clim["isa"].as<std::string>() << std::endl;
             return 127;
         }
@@ -183,7 +178,7 @@ int main(int argc, char *argv[]) {
         }
         uint64_t start_address = 0;
         if (clim.count("mem"))
-            vm->get_arch()->load_file(clim["mem"].as<std::string>(), iss::arch::traits<core_type>::MEM);
+            vm->get_arch()->load_file(clim["mem"].as<std::string>());
         if (clim.count("elf"))
             for (std::string input : clim["elf"].as<std::vector<std::string>>()) {
                 auto start_addr = vm->get_arch()->load_file(input);