From 459794b863c8707071f72667a33a10d7dd1f7c76 Mon Sep 17 00:00:00 2001
From: Eyck Jentzsch <eyck@minres.com>
Date: Sat, 6 Nov 2021 13:29:11 +0100
Subject: [PATCH] add proper handling of store access fault (hart_mu_p)

---
 incl/iss/arch/riscv_hart_mu_p.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/incl/iss/arch/riscv_hart_mu_p.h b/incl/iss/arch/riscv_hart_mu_p.h
index 5ade158..751f87e 100644
--- a/incl/iss/arch/riscv_hart_mu_p.h
+++ b/incl/iss/arch/riscv_hart_mu_p.h
@@ -1235,6 +1235,7 @@ template <typename BASE, features_e FEAT> uint64_t riscv_hart_mu_p<BASE, FEAT>::
             break;
         case 4:
         case 6:
+        case 7:
             csr[utval | (new_priv << 8)] = fault_data;
             break;
         default: