diff --git a/.cproject b/.cproject
index 54f8083..8c80bd0 100644
--- a/.cproject
+++ b/.cproject
@@ -33,9 +33,12 @@
 									<listOptionValue builtIn="false" value="/usr/include/llvm-4.0"/>
 									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/Seasocks/1.3.2/minres/stable/source/seasocks/src/main/c&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/Poco/1.7.8p3/pocoproject/stable/package/506dd97d52a31e919c8613e1e6dc66d79f5a9625/include&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/SystemCVerification/2.0.0a/minres/stable/package/d9580b78ca474433b46b653ea2c6c83385840479/include&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/SystemC/2.3.2/minres/stable/package/5da42a16f2fe7e4182d2c23eaed73d10d0bca3f4/include&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/zlib/1.2.11/conan/stable/package/0a813c597d519ec14c71192b99d7de0a92bbc1c3/include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/gsl_microsoft/20180102/bincrafters/stable/package/5ab84d6acfe1f23c4fae0ab88f26e3a396351ac9/include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/spdlog/0.16.3/bincrafters/stable/package/5ab84d6acfe1f23c4fae0ab88f26e3a396351ac9/include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/SystemCVerification/2.0.1/minres/stable/package/d9580b78ca474433b46b653ea2c6c83385840479/include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${HOME}/.conan/data/SystemC-CCI/0.9.0/minres/stable/package/d9580b78ca474433b46b653ea2c6c83385840479/include&quot;"/>
 								</option>
 								<option id="gnu.cpp.compiler.option.preprocessor.def.625649396" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" useByScannerDiscovery="false" valueType="definedSymbols">
 									<listOptionValue builtIn="false" value="WITH_SYSTEMC"/>
diff --git a/README.md b/README.md
index 3dea4c9..bbe8063 100644
--- a/README.md
+++ b/README.md
@@ -34,6 +34,7 @@ DBT-RISE-RISCV uses libGIS (https://github.com/vsergeev/libGIS) as well as ELFIO
 * setup conan to use the minres repo:
 ```
     conan remote add minres https://api.bintray.com/conan/minres/conan-repo
+    conan remote add bincrafters https://api.bintray.com/conan/bincrafters/public-conan
 ```
 * checkout source from git
 * start an out-of-source build:
diff --git a/conanfile.txt b/conanfile.txt
index 81f77c2..20309c4 100644
--- a/conanfile.txt
+++ b/conanfile.txt
@@ -1,8 +1,11 @@
 [requires]
+	gsl_microsoft/20180102@bincrafters/stable
+	spdlog/0.16.3@bincrafters/stable
     Poco/1.7.8p3@pocoproject/stable
     Seasocks/1.3.2@minres/stable
     SystemC/2.3.2@minres/stable
-    SystemCVerification/2.0.0a@minres/stable
+    SystemCVerification/2.0.1@minres/stable
+    SystemC-CCI/0.9.0@minres/stable
 
 [generators]
     cmake
@@ -12,4 +15,6 @@
     Poco:shared=True
     Seasocks:shared=False
     SystemC:stdcxx=14
-    SystemCVerification:stdcxx=14
\ No newline at end of file
+    SystemC:shared=True
+    SystemCVerification:stdcxx=14
+    SystemC-CCI:stdcxx=14
\ No newline at end of file
diff --git a/dbt-core b/dbt-core
index 5a31988..2450e0f 160000
--- a/dbt-core
+++ b/dbt-core
@@ -1 +1 @@
-Subproject commit 5a31988a9d389db6e3862fc611125e11fe75362c
+Subproject commit 2450e0f3e3fdf2466247cbeac585f5b8680079d4
diff --git a/riscv.sc/CMakeLists.txt b/riscv.sc/CMakeLists.txt
index 48a32c4..5236f99 100644
--- a/riscv.sc/CMakeLists.txt
+++ b/riscv.sc/CMakeLists.txt
@@ -49,6 +49,13 @@ else(SystemC_FOUND)
     message( FATAL_ERROR "SystemC library not found." )
 endif(SystemC_FOUND)
 
+if(CCI_FOUND)
+    include_directories(${CCI_INCLUDE_DIRS})
+    link_directories(${CCI_LIBRARY_DIRS})
+else()
+    message( FATAL_ERROR "SystemC CCI library not found." )
+endif()
+
 if(SCV_FOUND)   
     add_definitions(-DWITH_SCV)
     link_directories(${SCV_LIBRARY_DIRS})
diff --git a/riscv.sc/incl/sysc/SiFive/core_complex.h b/riscv.sc/incl/sysc/SiFive/core_complex.h
index 24f5b1f..7c4521e 100644
--- a/riscv.sc/incl/sysc/SiFive/core_complex.h
+++ b/riscv.sc/incl/sysc/SiFive/core_complex.h
@@ -40,8 +40,8 @@
 #include "scc/utilities.h"
 #include <tlm>
 #include <tlm_utils/tlm_quantumkeeper.h>
+#include <cci_configuration>
 #include <util/range_lut.h>
-#include "scc/ext_attribute.h"
 #include "scv4tlm/tlm_rec_initiator_socket.h"
 #include "scc/initiator_mixin.h"
 #include "scc/traceable.h"
@@ -94,15 +94,15 @@ public:
 
     sc_core::sc_vector<sc_core::sc_in<bool>> local_irq_i;
 
-    scc::ext_attribute<std::string> elf_file;
+    cci::cci_param<std::string> elf_file;
 
-    scc::ext_attribute<bool> enable_disass;
+    cci::cci_param<bool> enable_disass;
 
-    scc::ext_attribute<uint64_t> reset_address;
+    cci::cci_param<uint64_t> reset_address;
 
-    scc::ext_attribute<unsigned short> gdb_server_port;
+    cci::cci_param<unsigned short> gdb_server_port;
 
-    scc::ext_attribute<bool> dump_ir;
+    cci::cci_param<bool> dump_ir;
 
     core_complex(sc_core::sc_module_name name);
 
diff --git a/riscv.sc/incl/sysc/SiFive/gpio.h b/riscv.sc/incl/sysc/SiFive/gpio.h
index 3d03681..5dd1de3 100644
--- a/riscv.sc/incl/sysc/SiFive/gpio.h
+++ b/riscv.sc/incl/sysc/SiFive/gpio.h
@@ -38,7 +38,7 @@
 #define _GPIO_H_
 
 #include "scc/tlm_target.h"
-#include "scc/ext_attribute.h"
+#include "cci_configuration"
 #include <sysc/communication/sc_signal_rv_ports.h>
 
 namespace sysc {
@@ -56,7 +56,8 @@ public:
     gpio(sc_core::sc_module_name nm);
     virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
 
-    scc::ext_attribute<bool> write_to_ws;
+    cci::cci_param<bool> write_to_ws;
+
 protected:
     void clock_cb();
     void reset_cb();
diff --git a/riscv.sc/incl/sysc/SiFive/uart.h b/riscv.sc/incl/sysc/SiFive/uart.h
index 4052d61..68e6e3e 100644
--- a/riscv.sc/incl/sysc/SiFive/uart.h
+++ b/riscv.sc/incl/sysc/SiFive/uart.h
@@ -37,7 +37,7 @@
 #ifndef _UART_H_
 #define _UART_H_
 
-#include "scc/ext_attribute.h"
+#include "cci_configuration"
 #include "scc/tlm_target.h"
 
 namespace sysc {
@@ -53,7 +53,7 @@ public:
     uart(sc_core::sc_module_name nm);
     virtual ~uart() override;
 
-    scc::ext_attribute<bool> write_to_ws;
+    cci::cci_param<bool> write_to_ws;
 protected:
     void clock_cb();
     void reset_cb();
diff --git a/riscv.sc/src/CMakeLists.txt b/riscv.sc/src/CMakeLists.txt
index f097e83..348b663 100644
--- a/riscv.sc/src/CMakeLists.txt
+++ b/riscv.sc/src/CMakeLists.txt
@@ -28,8 +28,10 @@ set(APPLICATION_NAME riscv.sc)
 
 include_directories(${CONAN_INCLUDE_DIRS_SEASOCKS})
 include_directories(${SystemC_INCLUDE_DIRS})
+include_directories(${CCI_INCLUDE_DIRS})
 
 link_directories(${SystemC_LIBRARY_DIR})
+link_directories(${CCI_LIBRARY_DIR})
 link_directories(${CONAN_LIB_DIRS_SEASOCKS})
 
 add_executable(${APPLICATION_NAME} ${APP_SOURCES})
@@ -43,6 +45,7 @@ target_link_libraries(${APPLICATION_NAME} sc-components)
 target_link_libraries(${APPLICATION_NAME} ${CONAN_LIBS_SEASOCKS})
 target_link_libraries(${APPLICATION_NAME} external)
 target_link_libraries(${APPLICATION_NAME} ${llvm_libs})
+target_link_libraries(${APPLICATION_NAME} ${CCI_LIBRARIES} )
 target_link_libraries(${APPLICATION_NAME} ${SystemC_LIBRARIES} )
 if(SCV_FOUND)
     add_definitions(-DWITH_SCV)
diff --git a/riscv.sc/src/sc_main.cpp b/riscv.sc/src/sc_main.cpp
index e01c9de..dadc580 100644
--- a/riscv.sc/src/sc_main.cpp
+++ b/riscv.sc/src/sc_main.cpp
@@ -43,6 +43,7 @@
 #include "scc/report.h"
 #include "scc/scv_tr_db.h"
 #include "scc/tracer.h"
+#include <cci_utils/broker.h>
 
 using namespace sysc;
 namespace po = boost::program_options;
@@ -56,6 +57,7 @@ const size_t ERROR_UNHANDLED_EXCEPTION = 2;
 int sc_main(int argc, char *argv[]) {
     //    sc_report_handler::set_handler(my_report_handler);
     scc::Logger<>::reporting_level() = logging::ERROR;
+    cci::cci_register_broker(new cci_utils::broker("Global Broker"));
     ///////////////////////////////////////////////////////////////////////////
     // CLI argument parsing
     ///////////////////////////////////////////////////////////////////////////
@@ -63,10 +65,9 @@ int sc_main(int argc, char *argv[]) {
     // clang-format off
     desc.add_options()
             ("help,h", "Print help message")
-            ("verbose,v", po::value<int>()->implicit_value(0), "Sets logging verbosity")
+            ("verbose,v", po::value<int>()->implicit_value(3), "Sets logging verbosity")
             ("log-file", po::value<std::string>(), "Sets default log file.")
             ("disass,d", po::value<std::string>()->implicit_value(""), "Enables disassembly")
-//            ("elf,l", po::value<std::vector<std::string>>(), "ELF file(s) to load")
             ("elf,l", po::value<std::string>(), "ELF file to load")
             ("gdb-port,g", po::value<unsigned short>()->default_value(0), "enable gdb server and specify port to use")
             ("dump-ir", "dump the intermediate representation")
@@ -125,14 +126,14 @@ int sc_main(int argc, char *argv[]) {
     platform i_simple_system("i_simple_system");
     // sr_report_handler::add_sc_object_to_filter(&i_simple_system.i_master,
     // sc_core::SC_WARNING, sc_core::SC_MEDIUM);
-    if (vm.count("dump-config")){
+    if(vm["dump-config"].as<std::string>().size()>0){
     	std::ofstream of{vm["dump-config"].as<std::string>()};
     	if(of.is_open())
     	    cfg.dump_configuration(of);
     }
 	cfg.configure();
     // overwrite with command line settings
-    if (vm.count("gdb-port"))
+    if (vm["gdb-port"].as<unsigned short>())
     	cfg.set_value("i_simple_system.i_core_complex.gdb_server_port", vm["gdb-port"].as<unsigned short>());
     if (vm.count("dump-ir"))
     	cfg.set_value("i_simple_system.i_core_complex.dump_ir", vm.count("dump-ir") != 0);
diff --git a/riscv.sc/src/sysc/core_complex.cpp b/riscv.sc/src/sysc/core_complex.cpp
index aaf7e7a..c7a0aae 100644
--- a/riscv.sc/src/sysc/core_complex.cpp
+++ b/riscv.sc/src/sysc/core_complex.cpp
@@ -211,11 +211,11 @@ core_complex::core_complex(sc_core::sc_module_name name)
 , NAMED(global_irq_i)
 , NAMED(timer_irq_i)
 , NAMED(local_irq_i, 16)
-, NAMED(elf_file, this)
-, NAMED(enable_disass, true, this)
-, NAMED(reset_address, 0ULL, this)
-, NAMED(gdb_server_port, 0, this)
-, NAMED(dump_ir, false, this)
+, NAMED(elf_file, "")
+, NAMED(enable_disass, true)
+, NAMED(reset_address, 0ULL)
+, NAMED(gdb_server_port, 0)
+, NAMED(dump_ir, false)
 , read_lut(tlm_dmi_ext())
 , write_lut(tlm_dmi_ext())
 , tgt_adapter(nullptr)
@@ -255,8 +255,8 @@ void core_complex::trace(sc_core::sc_trace_file *trf) {}
 
 void core_complex::before_end_of_elaboration() {
     cpu = make_unique<core_wrapper>(this);
-    vm = create<arch::rv32imac>(cpu.get(), gdb_server_port.value, dump_ir.value);
-    vm->setDisassEnabled(enable_disass.value);
+    vm = create<arch::rv32imac>(cpu.get(), gdb_server_port.get_value(), dump_ir.get_value());
+    vm->setDisassEnabled(enable_disass.get_value());
     auto* srv = debugger::server<debugger::gdb_session>::get();
     if(srv) tgt_adapter = srv->get_target();
     if(tgt_adapter)
@@ -270,7 +270,10 @@ void core_complex::before_end_of_elaboration() {
 
 void core_complex::start_of_simulation() {
     quantum_keeper.reset();
-    if (elf_file.value.size() > 0) cpu->load_file(elf_file.value);
+    if (elf_file.get_value().size() > 0){
+    	std::pair<uint64_t,bool> start_addr=cpu->load_file(elf_file.get_value());
+    	if(reset_address.is_default_value() && start_addr.second==true) reset_address.set_value(start_addr.first);
+    }
 #ifdef WITH_SCV
         if (m_db!=nullptr && stream_handle == nullptr) {
             string basename(this->name());
@@ -312,7 +315,7 @@ void core_complex::global_irq_cb(){
 
 void core_complex::run() {
     wait(sc_core::SC_ZERO_TIME);
-    cpu->reset(reset_address.value);
+    cpu->reset(reset_address.get_value());
     try {
         vm->start(-1);
     } catch (simulation_stopped &e) {
diff --git a/riscv.sc/src/sysc/gpio.cpp b/riscv.sc/src/sysc/gpio.cpp
index a0a41db..28eaffa 100644
--- a/riscv.sc/src/sysc/gpio.cpp
+++ b/riscv.sc/src/sysc/gpio.cpp
@@ -50,7 +50,7 @@ gpio::gpio(sc_core::sc_module_name nm)
 , NAMED(rst_i)
 , NAMED(pins_io)
 , NAMEDD(gpio_regs, regs)
-, NAMED(write_to_ws, false, this){
+, NAMED(write_to_ws, false){
     regs->registerResources(*this);
     SC_METHOD(clock_cb);
     sensitive << clk_i;
@@ -82,7 +82,7 @@ gpio::gpio(sc_core::sc_module_name nm)
 gpio::~gpio() {}
 
 void gpio::before_end_of_elaboration() {
-	if(write_to_ws.value) {
+	if(write_to_ws.get_value()) {
 		LOG(TRACE)<<"Adding WS handler for "<<(std::string{"/ws/"}+name());
 		handler=std::make_shared<WsHandler>();
 		sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"}+name()).c_str(), handler);
diff --git a/riscv.sc/src/sysc/uart.cpp b/riscv.sc/src/sysc/uart.cpp
index 9031f2e..f90bd7c 100644
--- a/riscv.sc/src/sysc/uart.cpp
+++ b/riscv.sc/src/sysc/uart.cpp
@@ -57,7 +57,7 @@ uart::uart(sc_core::sc_module_name nm)
 , NAMED(clk_i)
 , NAMED(rst_i)
 , NAMEDD(uart_regs, regs)
-, NAMED(write_to_ws, false, this) {
+, NAMED(write_to_ws, false) {
     regs->registerResources(*this);
     SC_METHOD(clock_cb);
     sensitive << clk_i;
@@ -76,7 +76,7 @@ uart::uart(sc_core::sc_module_name nm)
 uart::~uart() {}
 
 void uart::before_end_of_elaboration() {
-	if(write_to_ws.value) {
+	if(write_to_ws.get_value()) {
 	    LOG(TRACE)<<"Adding WS handler for "<<(std::string{"/ws/"}+name());
 	    handler=std::make_shared<WsHandler>();
 	    sc_comm_singleton::inst().registerWebSocketHandler((std::string{"/ws/"}+name()).c_str(), handler);
diff --git a/riscv/incl/iss/arch/riscv_hart_msu_vp.h b/riscv/incl/iss/arch/riscv_hart_msu_vp.h
index e7e6df3..4c0d905 100644
--- a/riscv/incl/iss/arch/riscv_hart_msu_vp.h
+++ b/riscv/incl/iss/arch/riscv_hart_msu_vp.h
@@ -451,7 +451,7 @@ public:
 
     void reset(uint64_t address) override;
 
-    void load_file(std::string name, int type = -1) override;
+    std::pair<uint64_t,bool> load_file(std::string name, int type = -1) override;
 
     virtual phys_addr_t virt2phys(const iss::addr_t &addr) override;
 
@@ -551,7 +551,7 @@ riscv_hart_msu_vp<BASE>::riscv_hart_msu_vp()
     csr_wr_cb[satp] = &riscv_hart_msu_vp<BASE>::write_satp;
 }
 
-template <typename BASE> void riscv_hart_msu_vp<BASE>::load_file(std::string name, int type) {
+template <typename BASE> std::pair<uint64_t,bool> riscv_hart_msu_vp<BASE>::load_file(std::string name, int type) {
     FILE *fp = fopen(name.c_str(), "r");
     if (fp) {
 		std::array<char, 5> buf;
@@ -587,7 +587,8 @@ template <typename BASE> void riscv_hart_msu_vp<BASE>::load_file(std::string nam
                     fromhost = tohost + 0x40;
                 }
             }
-            return;
+
+            return std::make_pair(reader.get_entry(), true);
         }
         throw std::runtime_error("memory load file is not a valid elf file");
     }
diff --git a/riscv/src/main.cpp b/riscv/src/main.cpp
index 1cc659e..9039606 100644
--- a/riscv/src/main.cpp
+++ b/riscv/src/main.cpp
@@ -109,7 +109,7 @@ int main(int argc, char *argv[]) {
         } else if (isa_opt.substr(0, 4)=="rv32") {
             iss::arch::rv32imac* cpu = new iss::arch::riscv_hart_msu_vp<iss::arch::rv32imac>();
             vm = iss::create(cpu, clim["gdb-port"].as<unsigned>());
-            vm->register_plugin(cc_plugin);
+//            vm->register_plugin(cc_plugin);
         } else {
             LOG(ERROR) << "Illegal argument value for '--isa': " << clim["isa"].as<std::string>() << std::endl;
             return 127;
diff --git a/sc-components b/sc-components
index 19406ad..d4653d0 160000
--- a/sc-components
+++ b/sc-components
@@ -1 +1 @@
-Subproject commit 19406add3e723f032058c01ecae7c2c84bbe67e9
+Subproject commit d4653d028cec23a4d2ab63f1c213ac627393c7cf