diff --git a/gen_input/templates/interp/CORENAME.cpp.gtl b/gen_input/templates/interp/CORENAME.cpp.gtl
index e3654d6..53cffed 100644
--- a/gen_input/templates/interp/CORENAME.cpp.gtl
+++ b/gen_input/templates/interp/CORENAME.cpp.gtl
@@ -92,7 +92,10 @@ protected:
     // enum { MASK16 = 0b1111110001100011, MASK32 = 0b11111111111100000111000001111111 };
     enum { MASK16 = 0b1111111111111111, MASK32 = 0b11111111111100000111000001111111 };
     enum { EXTR_MASK16 = MASK16 >> 2, EXTR_MASK32 = MASK32 >> 2 };
-    enum { LUT_SIZE = 1 << util::bit_count(EXTR_MASK32), LUT_SIZE_C = 1 << util::bit_count(EXTR_MASK16) };
+    enum {
+        LUT_SIZE = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK32)),
+        LUT_SIZE_C = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK16))
+    };
 
     std::array<compile_func, LUT_SIZE> lut;
 
diff --git a/incl/iss/arch/riscv_hart_mu_p.h b/incl/iss/arch/riscv_hart_mu_p.h
index b6ea430..86bd720 100644
--- a/incl/iss/arch/riscv_hart_mu_p.h
+++ b/incl/iss/arch/riscv_hart_mu_p.h
@@ -493,7 +493,7 @@ template <typename BASE, features_e FEAT> std::pair<uint64_t, bool> riscv_hart_m
                             traits<BASE>::MEM, pseg->get_physical_address(),
                             fsize, reinterpret_cast<const uint8_t *const>(seg_data));
                     if (res != iss::Ok)
-                        LOG(ERROR) << "problem writing " << fsize << "bytes to 0x" << std::hex
+                        LOG(ERR) << "problem writing " << fsize << "bytes to 0x" << std::hex
                                    << pseg->get_physical_address();
                 }
             }
diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp
index 1cbb859..f515edd 100644
--- a/src/vm/interp/vm_tgc_c.cpp
+++ b/src/vm/interp/vm_tgc_c.cpp
@@ -30,21 +30,23 @@
  *
  *******************************************************************************/
 
-// clang-format off
+#include "../fp_functions.h"
+#include <iss/arch/tgc_c.h>
+#include <iss/arch/riscv_hart_m_p.h>
 #include <iss/debugger/gdb_session.h>
 #include <iss/debugger/server.h>
 #include <iss/iss.h>
-#include <iss/arch/tgc_c.h>
-#include <iss/arch/riscv_hart_m_p.h>
 #include <iss/interp/vm_base.h>
-#include "../fp_functions.h"
 #include <util/logging.h>
 #include <sstream>
+
+#ifndef FMT_HEADER_ONLY
+#define FMT_HEADER_ONLY
+#endif
 #include <fmt/format.h>
 
 #include <array>
 #include <iss/debugger/riscv_target_adapter.h>
-// clang-format on
 
 namespace iss {
 namespace interp {
@@ -90,7 +92,10 @@ protected:
     // enum { MASK16 = 0b1111110001100011, MASK32 = 0b11111111111100000111000001111111 };
     enum { MASK16 = 0b1111111111111111, MASK32 = 0b11111111111100000111000001111111 };
     enum { EXTR_MASK16 = MASK16 >> 2, EXTR_MASK32 = MASK32 >> 2 };
-    enum { LUT_SIZE = 1 << util::bit_count(EXTR_MASK32), LUT_SIZE_C = 1 << util::bit_count(EXTR_MASK16) };
+    enum {
+        LUT_SIZE = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK32)),
+        LUT_SIZE_C = 1 << util::bit_count(static_cast<uint32_t>(EXTR_MASK16))
+    };
 
     std::array<compile_func, LUT_SIZE> lut;
 
@@ -4098,6 +4103,7 @@ private:
         return pc;
     }
 
+    //static constexpr typename traits::addr_t upper_bits = ~traits::PGMASK;
     iss::status fetch_ins(virt_addr_t pc, uint8_t * data){
         auto phys_pc = this->core.v2p(pc);
         //if ((pc.val & upper_bits) != ((pc.val + 2) & upper_bits)) { // we may cross a page boundary