From 309758b9941b849807d8445554f1c23985f51b32 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Wed, 17 Nov 2021 07:59:02 +0100 Subject: [PATCH] fix clic_cfg access scheme --- incl/iss/arch/riscv_hart_mu_p.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/incl/iss/arch/riscv_hart_mu_p.h b/incl/iss/arch/riscv_hart_mu_p.h index f48a28e..353dfd8 100644 --- a/incl/iss/arch/riscv_hart_mu_p.h +++ b/incl/iss/arch/riscv_hart_mu_p.h @@ -1222,7 +1222,7 @@ template iss::status riscv_hart_mu_p::write_clic(uint64_t addr, unsigned length, const uint8_t *const data) { if(addr==clic_base_addr) { // cliccfg clic_cfg_reg = *data; - clic_cfg_reg&= 0x7f; + clic_cfg_reg&= 0x7e; // } else if(addr>=(clic_base_addr+4) && (addr+length)<=(clic_base_addr+4)){ // clicinfo // write_uint32(addr, clic_info_reg, data, length); } else if(addr>=(clic_base_addr+0x40) && (addr+length)<=(clic_base_addr+0xC0)){ // clicinttrig