From 2f3abf2f763f5c935876afcf4214432ba3c779fe Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Mon, 23 Sep 2024 11:51:32 +0200 Subject: [PATCH] adds namespaces for ELFIO --- src/iss/arch/riscv_hart_common.h | 13 +++++++------ src/iss/arch/riscv_hart_m_p.h | 5 +++-- src/iss/arch/riscv_hart_msu_vp.h | 7 ++++--- src/iss/arch/riscv_hart_mu_p.h | 7 ++++--- 4 files changed, 18 insertions(+), 14 deletions(-) diff --git a/src/iss/arch/riscv_hart_common.h b/src/iss/arch/riscv_hart_common.h index 110681a..6093909 100644 --- a/src/iss/arch/riscv_hart_common.h +++ b/src/iss/arch/riscv_hart_common.h @@ -319,7 +319,8 @@ struct riscv_hart_common { uint64_t tohost = tohost_dflt; uint64_t fromhost = fromhost_dflt; - bool read_elf_file(std::string name, uint8_t expected_elf_class, std::function cb) { + bool read_elf_file(std::string name, uint8_t expected_elf_class, + std::function cb) { // Create elfio reader ELFIO::elfio reader; // Load ELF data @@ -327,12 +328,12 @@ struct riscv_hart_common { // check elf properties if(reader.get_class() != expected_elf_class) return false; - if(reader.get_type() != ET_EXEC) - return false; - if(reader.get_machine() != EM_RISCV) + if(reader.get_type() != ELFIO::ET_EXEC) + return false; + if(reader.get_machine() != ELFIO::EM_RISCV) return false; entry_address = reader.get_entry(); - for(const auto pseg : reader.segments) { + for(const auto& pseg : reader.segments) { const auto fsize = pseg->get_file_size(); // 0x42c/0x0 const auto seg_data = pseg->get_data(); const auto type = pseg->get_type(); @@ -343,7 +344,7 @@ struct riscv_hart_common { } } const auto sym_sec = reader.sections[".symtab"]; - if(SHT_SYMTAB == sym_sec->get_type() || SHT_DYNSYM == sym_sec->get_type()) { + if(ELFIO::SHT_SYMTAB == sym_sec->get_type() || ELFIO::SHT_DYNSYM == sym_sec->get_type()) { ELFIO::symbol_section_accessor symbols(reader, sym_sec); auto sym_no = symbols.get_symbols_num(); std::string name; diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index 71a167a..49adecf 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -572,7 +572,7 @@ riscv_hart_m_p::riscv_hart_m_p(feature_config cfg) template std::pair riscv_hart_m_p::load_file(std::string name, int type) { - if(read_elf_file(name, sizeof(reg_t) == 4 ? ELFCLASS32 : ELFCLASS64, + if(read_elf_file(name, sizeof(reg_t) == 4 ? ELFIO::ELFCLASS32 : ELFIO::ELFCLASS64, [this](uint64_t addr, uint64_t size, const uint8_t* const data) -> iss::status { return this->write(iss::address_type::PHYSICAL, iss::access_type::DEBUG_WRITE, traits::MEM, addr, size, data); @@ -1326,7 +1326,8 @@ uint64_t riscv_hart_m_p::enter_trap(uint64_t flags, uint64_t #endif if((flags & 0xffffffff) != 0xffffffff) NSCLOG(INFO, LOGCAT) << (trap_id ? "Interrupt" : "Trap") << " with cause '" << (trap_id ? irq_str[cause] : trap_str[cause]) << "' (" - << cause << ")" << " at address " << buffer.data() << " occurred"; + << cause << ")" + << " at address " << buffer.data() << " occurred"; return this->reg.NEXT_PC; } diff --git a/src/iss/arch/riscv_hart_msu_vp.h b/src/iss/arch/riscv_hart_msu_vp.h index 5d18008..41bc035 100644 --- a/src/iss/arch/riscv_hart_msu_vp.h +++ b/src/iss/arch/riscv_hart_msu_vp.h @@ -555,7 +555,7 @@ riscv_hart_msu_vp::riscv_hart_msu_vp() } template std::pair riscv_hart_msu_vp::load_file(std::string name, int type) { - if(read_elf_file(name, sizeof(reg_t) == 4 ? ELFCLASS32 : ELFCLASS64, + if(read_elf_file(name, sizeof(reg_t) == 4 ? ELFIO::ELFCLASS32 : ELFIO::ELFCLASS64, [this](uint64_t addr, uint64_t size, const uint8_t* const data) -> iss::status { return this->write(iss::address_type::PHYSICAL, iss::access_type::DEBUG_WRITE, traits::MEM, addr, size, data); @@ -1337,8 +1337,9 @@ template uint64_t riscv_hart_msu_vp::enter_trap(uint64_t f sprintf(buffer.data(), "0x%016lx", addr); if((flags & 0xffffffff) != 0xffffffff) CLOG(INFO, disass) << (trap_id ? "Interrupt" : "Trap") << " with cause '" << (trap_id ? irq_str[cause] : trap_str[cause]) << "' (" - << cause << ")" << " at address " << buffer.data() << " occurred, changing privilege level from " - << lvl[cur_priv] << " to " << lvl[new_priv]; + << cause << ")" + << " at address " << buffer.data() << " occurred, changing privilege level from " << lvl[cur_priv] << " to " + << lvl[new_priv]; // reset trap state this->reg.PRIV = new_priv; this->reg.trap_state = 0; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index 017db84..8620117 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -649,7 +649,7 @@ riscv_hart_mu_p::riscv_hart_mu_p(feature_config cfg) template std::pair riscv_hart_mu_p::load_file(std::string name, int type) { - if(read_elf_file(name, sizeof(reg_t) == 4 ? ELFCLASS32 : ELFCLASS64, + if(read_elf_file(name, sizeof(reg_t) == 4 ? ELFIO::ELFCLASS32 : ELFIO::ELFCLASS64, [this](uint64_t addr, uint64_t size, const uint8_t* const data) -> iss::status { return this->write(iss::address_type::PHYSICAL, iss::access_type::DEBUG_WRITE, traits::MEM, addr, size, data); @@ -1565,8 +1565,9 @@ uint64_t riscv_hart_mu_p::enter_trap(uint64_t flags, uint64_ #endif if((flags & 0xffffffff) != 0xffffffff) CLOG(INFO, disass) << (trap_id ? "Interrupt" : "Trap") << " with cause '" << (trap_id ? irq_str[cause] : trap_str[cause]) << "' (" - << cause << ")" << " at address " << buffer.data() << " occurred, changing privilege level from " - << lvl[this->reg.PRIV] << " to " << lvl[new_priv]; + << cause << ")" + << " at address " << buffer.data() << " occurred, changing privilege level from " << lvl[this->reg.PRIV] + << " to " << lvl[new_priv]; // reset trap state this->reg.PRIV = new_priv; this->reg.trap_state = 0;