From 2e670c4d0300d2b17d3f0e62217873971554a65e Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sun, 6 Mar 2022 15:11:38 +0100 Subject: [PATCH] change interpreter structure --- gen_input/templates/interp/CORENAME.cpp.gtl | 2 +- src/vm/interp/vm_tgc_c.cpp | 174 ++++++++++---------- 2 files changed, 88 insertions(+), 88 deletions(-) diff --git a/gen_input/templates/interp/CORENAME.cpp.gtl b/gen_input/templates/interp/CORENAME.cpp.gtl index 084bafd..98817ce 100644 --- a/gen_input/templates/interp/CORENAME.cpp.gtl +++ b/gen_input/templates/interp/CORENAME.cpp.gtl @@ -326,7 +326,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } // post execution stuff process_spawn_blocks(); - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 65); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast(inst_id)); // trap check if(*trap_state!=0){ super::core.enter_trap(*trap_state, pc.val, instr); diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp index 4f5f98d..9bbf941 100644 --- a/src/vm/interp/vm_tgc_c.cpp +++ b/src/vm/interp/vm_tgc_c.cpp @@ -397,7 +397,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = (int32_t)imm; + if(rd != 0) *(X+rd) = (int32_t)imm; } catch(...){} } break; @@ -417,7 +417,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *PC + (int32_t)imm; + if(rd != 0) *(X+rd) = *PC + (int32_t)imm; } catch(...){} } break; @@ -439,10 +439,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { - if(rd != 0) *(X+rd) = *PC + 4; + if(rd != 0) *(X+rd) = *PC + 4; pc_assign(*NEXT_PC) = *PC + (int32_t)sext<21>(imm); } } @@ -469,10 +469,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { int32_t new_pc = (*(X+rs1) + (int16_t)sext<12>(imm)) & ~ 1; if(new_pc % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { - if(rd != 0) *(X+rd) = *PC + 4; + if(rd != 0) *(X+rd) = *PC + 4; pc_assign(*NEXT_PC) = new_pc & ~ 0x1; } } @@ -498,7 +498,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(*(X+rs1) == *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); @@ -526,7 +526,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(*(X+rs1) != *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); @@ -554,7 +554,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if((int32_t)*(X+rs1) < (int32_t)*(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); @@ -582,7 +582,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if((int32_t)*(X+rs1) >= (int32_t)*(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); @@ -610,7 +610,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(*(X+rs1) < *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); @@ -638,7 +638,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(*(X+rs1) >= *(X+rs2)) if(imm % traits::INSTR_ALIGNMENT) { - raise(0, 0); + raise( 0, 0); } else { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); @@ -666,7 +666,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { int8_t res = (int8_t)readSpace1(traits::MEM, *(X+rs1) + (int16_t)sext<12>(imm)); - if(rd != 0) *(X+rd) = res; + if(rd != 0) *(X+rd) = res; } } catch(...){} } @@ -691,7 +691,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm); int16_t res = (int16_t)readSpace2(traits::MEM, load_address); - if(rd != 0) *(X+rd) = res; + if(rd != 0) *(X+rd) = res; } } catch(...){} } @@ -716,7 +716,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm); int32_t res = (int32_t)readSpace4(traits::MEM, load_address); - if(rd != 0) *(X+rd) = (uint32_t)res; + if(rd != 0) *(X+rd) = (uint32_t)res; } } catch(...){} } @@ -740,7 +740,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint8_t res = (uint8_t)readSpace1(traits::MEM, *(X+rs1) + (int16_t)sext<12>(imm)); - if(rd != 0) *(X+rd) = res; + if(rd != 0) *(X+rd) = res; } } catch(...){} } @@ -765,7 +765,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm); uint16_t res = (uint16_t)readSpace2(traits::MEM, load_address); - if(rd != 0) *(X+rd) = res; + if(rd != 0) *(X+rd) = res; } } catch(...){} } @@ -856,7 +856,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) + (int16_t)sext<12>(imm); + if(rd != 0) *(X+rd) = *(X+rs1) + (int16_t)sext<12>(imm); } catch(...){} } break; @@ -877,7 +877,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) < (int16_t)sext<12>(imm)? 1 : 0; + if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) < (int16_t)sext<12>(imm)? 1 : 0; } catch(...){} } break; @@ -898,7 +898,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = (*(X+rs1) < (uint32_t)((int16_t)sext<12>(imm)))? 1 : 0; + if(rd != 0) *(X+rd) = (*(X+rs1) < (uint32_t)((int16_t)sext<12>(imm)))? 1 : 0; } catch(...){} } break; @@ -919,7 +919,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) ^ (int16_t)sext<12>(imm); + if(rd != 0) *(X+rd) = *(X+rs1) ^ (int16_t)sext<12>(imm); } catch(...){} } break; @@ -940,7 +940,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) | (int16_t)sext<12>(imm); + if(rd != 0) *(X+rd) = *(X+rs1) | (int16_t)sext<12>(imm); } catch(...){} } break; @@ -961,7 +961,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) & (int16_t)sext<12>(imm); + if(rd != 0) *(X+rd) = *(X+rs1) & (int16_t)sext<12>(imm); } catch(...){} } break; @@ -983,10 +983,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { if(shamt > 31) { - raise(0, 0); + raise( 0, 0); } else { - if(rd != 0) *(X+rd) = *(X+rs1) << shamt; + if(rd != 0) *(X+rd) = *(X+rs1) << shamt; } } catch(...){} } @@ -1009,10 +1009,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { if(shamt > 31) { - raise(0, 0); + raise( 0, 0); } else { - if(rd != 0) *(X+rd) = *(X+rs1) >> shamt; + if(rd != 0) *(X+rd) = *(X+rs1) >> shamt; } } catch(...){} } @@ -1035,10 +1035,10 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { if(shamt > 31) { - raise(0, 0); + raise( 0, 0); } else { - if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) >> shamt; + if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) >> shamt; } } catch(...){} } @@ -1060,7 +1060,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) + *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rs1) + *(X+rs2); } catch(...){} } break; @@ -1081,7 +1081,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) - *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rs1) - *(X+rs2); } catch(...){} } break; @@ -1102,7 +1102,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) << (*(X+rs2) & (traits::XLEN - 1)); + if(rd != 0) *(X+rd) = *(X+rs1) << (*(X+rs2) & (traits::XLEN - 1)); } catch(...){} } break; @@ -1123,7 +1123,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) < (int32_t)*(X+rs2)? 1 : 0; + if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) < (int32_t)*(X+rs2)? 1 : 0; } catch(...){} } break; @@ -1144,7 +1144,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = (uint32_t)*(X+rs1) < (uint32_t)*(X+rs2)? 1 : 0; + if(rd != 0) *(X+rd) = (uint32_t)*(X+rs1) < (uint32_t)*(X+rs2)? 1 : 0; } catch(...){} } break; @@ -1165,7 +1165,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) ^ *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rs1) ^ *(X+rs2); } catch(...){} } break; @@ -1186,7 +1186,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); + if(rd != 0) *(X+rd) = *(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); } catch(...){} } break; @@ -1207,7 +1207,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); + if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); } catch(...){} } break; @@ -1228,7 +1228,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) | *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rs1) | *(X+rs2); } catch(...){} } break; @@ -1249,7 +1249,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs1) & *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rs1) & *(X+rs2); } catch(...){} } break; @@ -1285,7 +1285,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - raise(0, 11); + raise( 0, 11); } catch(...){} } break; @@ -1299,7 +1299,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - raise(0, 3); + raise( 0, 3); } catch(...){} } break; @@ -1313,7 +1313,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - leave(0); + leave( 0); } catch(...){} } break; @@ -1327,7 +1327,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - leave(1); + leave( 1); } catch(...){} } break; @@ -1341,7 +1341,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - leave(3); + leave( 3); } catch(...){} } break; @@ -1355,7 +1355,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 4; // execute instruction try { - wait(1); + wait( 1); } catch(...){} } break; @@ -1374,7 +1374,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { { - if(*PRIV < 4) raise(0, 2); + if(*PRIV < 4) raise( 0, 2); else { pc_assign(*NEXT_PC) = *DPC; *PRIV &= 0x3; @@ -1434,8 +1434,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { uint32_t xrd = readSpace4(traits::CSR, csr); uint32_t xrs1 = *(X+rs1); - if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd | xrs1); - if(rd != 0) *(X+rd) = xrd; + if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd | xrs1); + if(rd != 0) *(X+rd) = xrd; } } catch(...){} } @@ -1460,8 +1460,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { uint32_t xrd = readSpace4(traits::CSR, csr); uint32_t xrs1 = *(X+rs1); - if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd & ~ xrs1); - if(rd != 0) *(X+rd) = xrd; + if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd & ~ xrs1); + if(rd != 0) *(X+rd) = xrd; } } catch(...){} } @@ -1486,7 +1486,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co { uint32_t xrd = readSpace4(traits::CSR, csr); writeSpace4(traits::CSR, csr, (uint32_t)zimm); - if(rd != 0) *(X+rd) = xrd; + if(rd != 0) *(X+rd) = xrd; } } catch(...){} } @@ -1510,8 +1510,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint32_t xrd = readSpace4(traits::CSR, csr); - if(zimm != 0) writeSpace4(traits::CSR, csr, xrd | (uint32_t)zimm); - if(rd != 0) *(X+rd) = xrd; + if(zimm != 0) writeSpace4(traits::CSR, csr, xrd | (uint32_t)zimm); + if(rd != 0) *(X+rd) = xrd; } } catch(...){} } @@ -1535,8 +1535,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint32_t xrd = readSpace4(traits::CSR, csr); - if(zimm != 0) writeSpace4(traits::CSR, csr, xrd & ~ ((uint32_t)zimm)); - if(rd != 0) *(X+rd) = xrd; + if(zimm != 0) writeSpace4(traits::CSR, csr, xrd & ~ ((uint32_t)zimm)); + if(rd != 0) *(X+rd) = xrd; } } catch(...){} } @@ -1686,7 +1686,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co if(rd != 0) { if(*(X+rs2) != 0) { uint32_t MMIN = 1 << (traits::XLEN - 1); - if(*(X+rs1) == MMIN && (int32_t)*(X+rs2) == - 1) *(X+rd) = MMIN; + if(*(X+rs1) == MMIN && (int32_t)*(X+rs2) == - 1) *(X+rd) = MMIN; else *(X+rd) = (int32_t)*(X+rs1) / (int32_t)*(X+rs2); } else *(X+rd) = - 1; @@ -1714,7 +1714,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(rd != 0) { - if(*(X+rs2) != 0) *(X+rd) = *(X+rs1) / *(X+rs2); + if(*(X+rs2) != 0) *(X+rd) = *(X+rs1) / *(X+rs2); else *(X+rd) = - 1; } } @@ -1742,7 +1742,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co if(rd != 0) { if(*(X+rs2) != 0) { uint32_t MMIN = 1 << (traits::XLEN - 1); - if(*(X+rs1) == MMIN && (int32_t)*(X+rs2) == - 1) *(X+rd) = 0; + if(*(X+rs1) == MMIN && (int32_t)*(X+rs2) == - 1) *(X+rd) = 0; else *(X+rd) = (int32_t)*(X+rs1) % (int32_t)*(X+rs2); } else *(X+rd) = *(X+rs1); @@ -1770,7 +1770,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { if(rd != 0) { - if(*(X+rs2) != 0) *(X+rd) = *(X+rs1) % *(X+rs2); + if(*(X+rs2) != 0) *(X+rd) = *(X+rs1) % *(X+rs2); else *(X+rd) = *(X+rs1); } } @@ -1793,8 +1793,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(imm) *(X+(rd + 8)) = *(X+2) + imm; - else raise(0, 2); + if(imm) *(X+rd + 8) = *(X+2) + imm; + else raise( 0, 2); } catch(...){} } break; @@ -1816,8 +1816,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { { - uint32_t load_address = *(X+(rs1 + 8)) + uimm; - *(X+(rd + 8)) = (int32_t)readSpace4(traits::MEM, load_address); + uint32_t load_address = *(X+rs1 + 8) + uimm; + *(X+rd + 8) = (int32_t)readSpace4(traits::MEM, load_address); } } catch(...){} } @@ -1840,8 +1840,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { { - uint32_t load_address = *(X+(rs1 + 8)) + uimm; - writeSpace4(traits::MEM, load_address, *(X+(rs2 + 8))); + uint32_t load_address = *(X+rs1 + 8) + uimm; + writeSpace4(traits::MEM, load_address, *(X+rs2 + 8)); } } catch(...){} } @@ -1921,7 +1921,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { { - if(rd != 0) *(X+rd) = (uint32_t)(int32_t)sext<6>(imm); + if(rd != 0) *(X+rd) = (uint32_t)(int32_t)sext<6>(imm); } } catch(...){} } @@ -1943,8 +1943,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co // execute instruction try { { - if(imm == 0) raise(0, 2); - if(rd != 0) *(X+rd) = (int32_t)sext<18>(imm); + if(imm == 0) raise( 0, 2); + if(rd != 0) *(X+rd) = (int32_t)sext<18>(imm); } } catch(...){} } @@ -1964,8 +1964,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(nzimm) *(X+2) = *(X+2) + (int16_t)sext<10>(nzimm); - else raise(0, 2); + if(nzimm) *(X+2) = *(X+2) + (int16_t)sext<10>(nzimm); + else raise( 0, 2); } catch(...){} } break; @@ -1980,7 +1980,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - raise(0, 2); + raise( 0, 2); } catch(...){} } break; @@ -2075,7 +2075,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint32_t rd_idx = rd + 8; - *(X+rd_idx) = *(X+rd_idx) - *(X+(rs2 + 8)); + *(X+rd_idx) = *(X+rd_idx) - *(X+rs2 + 8); } } catch(...){} } @@ -2098,7 +2098,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint32_t rd_idx = rd + 8; - *(X+rd_idx) = *(X+rd_idx) ^ *(X+(rs2 + 8)); + *(X+rd_idx) = *(X+rd_idx) ^ *(X+rs2 + 8); } } catch(...){} } @@ -2121,7 +2121,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint32_t rd_idx = rd + 8; - *(X+rd_idx) = *(X+rd_idx) | *(X+(rs2 + 8)); + *(X+rd_idx) = *(X+rd_idx) | *(X+rs2 + 8); } } catch(...){} } @@ -2144,7 +2144,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co try { { uint32_t rd_idx = rd + 8; - *(X+rd_idx) = *(X+rd_idx) & *(X+(rs2 + 8)); + *(X+rd_idx) = *(X+rd_idx) & *(X+rs2 + 8); } } catch(...){} } @@ -2183,7 +2183,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(*(X+(rs1 + 8)) == 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); + if(*(X+rs1 + 8) == 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); } catch(...){} } break; @@ -2203,7 +2203,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(*(X+(rs1 + 8)) != 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); + if(*(X+rs1 + 8) != 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); } catch(...){} } break; @@ -2223,7 +2223,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(nzuimm) *(X+rs1) = *(X+rs1) << nzuimm; + if(nzuimm) *(X+rs1) = *(X+rs1) << nzuimm; } catch(...){} } break; @@ -2247,7 +2247,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co uint32_t offs = *(X+2) + uimm; *(X+rd) = (int32_t)readSpace4(traits::MEM, offs); } - else raise(0, 2); + else raise( 0, 2); } catch(...){} } break; @@ -2267,7 +2267,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rs2); } catch(...){} } break; @@ -2286,8 +2286,8 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(rs1) pc_assign(*NEXT_PC) = *(X+rs1) & ~ 0x1; - else raise(0, 2); + if(rs1) pc_assign(*NEXT_PC) = *(X+rs1) & ~ 0x1; + else raise( 0, 2); } catch(...){} } break; @@ -2301,7 +2301,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - raise(0, 2); + raise( 0, 2); } catch(...){} } break; @@ -2321,7 +2321,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - if(rd != 0) *(X+rd) = *(X+rd) + *(X+rs2); + if(rd != 0) *(X+rd) = *(X+rd) + *(X+rs2); } catch(...){} } break; @@ -2358,7 +2358,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - raise(0, 3); + raise( 0, 3); } catch(...){} } break; @@ -2395,7 +2395,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co *NEXT_PC = *PC + 2; // execute instruction try { - raise(0, 2); + raise( 0, 2); } catch(...){} } break; @@ -2406,7 +2406,7 @@ typename vm_base::virt_addr_t vm_impl::execute_inst(finish_cond_e co } // post execution stuff process_spawn_blocks(); - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 65); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast(inst_id)); // trap check if(*trap_state!=0){ super::core.enter_trap(*trap_state, pc.val, instr);