diff --git a/src/sysc/core_complex.cpp b/src/sysc/core_complex.cpp
index 6c2e2e5..051b0d7 100644
--- a/src/sysc/core_complex.cpp
+++ b/src/sysc/core_complex.cpp
@@ -427,7 +427,7 @@ bool core_complex::read_mem(uint64_t addr, unsigned length, uint8_t *const data,
         if (gp.get_response_status() != tlm::TLM_OK_RESPONSE) {
             return false;
         }
-        if (gp.is_dmi_allowed()) {
+        if (gp.is_dmi_allowed() && !GET_PROP_VALUE(disable_dmi)) {
             gp.set_command(tlm::TLM_READ_COMMAND);
             gp.set_address(addr);
             tlm_dmi_ext dmi_data;
@@ -473,7 +473,7 @@ bool core_complex::write_mem(uint64_t addr, unsigned length, const uint8_t *cons
         if (gp.get_response_status() != tlm::TLM_OK_RESPONSE) {
             return false;
         }
-        if (gp.is_dmi_allowed()) {
+        if (gp.is_dmi_allowed() && !GET_PROP_VALUE(disable_dmi)) {
             gp.set_command(tlm::TLM_READ_COMMAND);
             gp.set_address(addr);
             tlm_dmi_ext dmi_data;
diff --git a/src/sysc/core_complex.h b/src/sysc/core_complex.h
index e477639..78cbdb5 100644
--- a/src/sysc/core_complex.h
+++ b/src/sysc/core_complex.h
@@ -94,6 +94,8 @@ public:
 
     cci::cci_param<bool> enable_disass{"enable_disass", false};
 
+    cci::cci_param<bool> disable_dmi{"disable_dmi", false};
+
     cci::cci_param<uint64_t> reset_address{"reset_address", 0ULL};
 
     cci::cci_param<std::string> core_type{"core_type", "tgc5c"};
@@ -119,6 +121,8 @@ public:
 
     scml_property<bool> enable_disass{"enable_disass", false};
 
+    scml_property<bool> disable_dmi{"disable_dmi", false};
+
     scml_property<unsigned long long> reset_address{"reset_address", 0ULL};
 
     scml_property<std::string> core_type{"core_type", "tgc5c"};