From 1616f0ac9049e1acc1b434fef9e25e34374ef6b4 Mon Sep 17 00:00:00 2001
From: Eyck Jentzsch <eyck@minres.com>
Date: Sat, 30 Oct 2021 12:57:08 +0200
Subject: [PATCH] remove deprecated functions

---
 gen_input/templates/CORENAME.cpp.gtl |   4 +-
 gen_input/templates/CORENAME.h.gtl   |   8 -
 incl/iss/arch/tgc_c.h                |  85 +++--
 src/iss/tgc_c.cpp                    |   4 +-
 src/vm/interp/vm_tgc_c.cpp           | 454 +++++++++++++++------------
 5 files changed, 293 insertions(+), 262 deletions(-)

diff --git a/gen_input/templates/CORENAME.cpp.gtl b/gen_input/templates/CORENAME.cpp.gtl
index 9729bc2..849e965 100644
--- a/gen_input/templates/CORENAME.cpp.gtl
+++ b/gen_input/templates/CORENAME.cpp.gtl
@@ -58,7 +58,9 @@ ${coreDef.name.toLowerCase()}::${coreDef.name.toLowerCase()}() {
 ${coreDef.name.toLowerCase()}::~${coreDef.name.toLowerCase()}() = default;
 
 void ${coreDef.name.toLowerCase()}::reset(uint64_t address) {
-    for(size_t i=0; i<traits<${coreDef.name.toLowerCase()}>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<${coreDef.name.toLowerCase()}>::reg_t),0));
+    auto base_ptr = reinterpret_cast<traits<${coreDef.name.toLowerCase()}>::reg_t*>(get_regs_base_ptr());
+    for(size_t i=0; i<traits<tgc_c>::NUM_REGS; ++i)
+        *(base_ptr+i)=0;
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
diff --git a/gen_input/templates/CORENAME.h.gtl b/gen_input/templates/CORENAME.h.gtl
index 4358777..2105569 100644
--- a/gen_input/templates/CORENAME.h.gtl
+++ b/gen_input/templates/CORENAME.h.gtl
@@ -140,14 +140,6 @@ struct ${coreDef.name.toLowerCase()}: public arch_if {
     void reset(uint64_t address=0) override;
 
     uint8_t* get_regs_base_ptr() override;
-    /// deprecated
-    void get_reg(short idx, std::vector<uint8_t>& value) override {}
-    void set_reg(short idx, const std::vector<uint8_t>& value) override {}
-    /// deprecated
-    bool get_flag(int flag) override {return false;}
-    void set_flag(int, bool value) override {};
-    /// deprecated
-    void update_flags(operations op, uint64_t opr1, uint64_t opr2) override {};
 
     inline uint64_t get_icount() { return reg.icount; }
 
diff --git a/incl/iss/arch/tgc_c.h b/incl/iss/arch/tgc_c.h
index 5a96c9e..e7e440a 100644
--- a/incl/iss/arch/tgc_c.h
+++ b/incl/iss/arch/tgc_c.h
@@ -139,44 +139,45 @@ template <> struct traits<tgc_c> {
         CSRRWI = 47,
         CSRRSI = 48,
         CSRRCI = 49,
-        MUL = 50,
-        MULH = 51,
-        MULHSU = 52,
-        MULHU = 53,
-        DIV = 54,
-        DIVU = 55,
-        REM = 56,
-        REMU = 57,
-        CADDI4SPN = 58,
-        CLW = 59,
-        CSW = 60,
-        CADDI = 61,
-        CNOP = 62,
-        CJAL = 63,
-        CLI = 64,
-        CLUI = 65,
-        CADDI16SP = 66,
-        __reserved_clui = 67,
-        CSRLI = 68,
-        CSRAI = 69,
-        CANDI = 70,
-        CSUB = 71,
-        CXOR = 72,
-        COR = 73,
-        CAND = 74,
-        CJ = 75,
-        CBEQZ = 76,
-        CBNEZ = 77,
-        CSLLI = 78,
-        CLWSP = 79,
-        CMV = 80,
-        CJR = 81,
-        __reserved_cmv = 82,
-        CADD = 83,
-        CJALR = 84,
-        CEBREAK = 85,
-        CSWSP = 86,
-        DII = 87,
+        FENCE_I = 50,
+        MUL = 51,
+        MULH = 52,
+        MULHSU = 53,
+        MULHU = 54,
+        DIV = 55,
+        DIVU = 56,
+        REM = 57,
+        REMU = 58,
+        CADDI4SPN = 59,
+        CLW = 60,
+        CSW = 61,
+        CADDI = 62,
+        CNOP = 63,
+        CJAL = 64,
+        CLI = 65,
+        CLUI = 66,
+        CADDI16SP = 67,
+        __reserved_clui = 68,
+        CSRLI = 69,
+        CSRAI = 70,
+        CANDI = 71,
+        CSUB = 72,
+        CXOR = 73,
+        COR = 74,
+        CAND = 75,
+        CJ = 76,
+        CBEQZ = 77,
+        CBNEZ = 78,
+        CSLLI = 79,
+        CLWSP = 80,
+        CMV = 81,
+        CJR = 82,
+        __reserved_cmv = 83,
+        CADD = 84,
+        CJALR = 85,
+        CEBREAK = 86,
+        CSWSP = 87,
+        DII = 88,
         MAX_OPCODE
     };
 };
@@ -194,14 +195,6 @@ struct tgc_c: public arch_if {
     void reset(uint64_t address=0) override;
 
     uint8_t* get_regs_base_ptr() override;
-    /// deprecated
-    void get_reg(short idx, std::vector<uint8_t>& value) override {}
-    void set_reg(short idx, const std::vector<uint8_t>& value) override {}
-    /// deprecated
-    bool get_flag(int flag) override {return false;}
-    void set_flag(int, bool value) override {};
-    /// deprecated
-    void update_flags(operations op, uint64_t opr1, uint64_t opr2) override {};
 
     inline uint64_t get_icount() { return reg.icount; }
 
diff --git a/src/iss/tgc_c.cpp b/src/iss/tgc_c.cpp
index 31ac7b7..1dd9e89 100644
--- a/src/iss/tgc_c.cpp
+++ b/src/iss/tgc_c.cpp
@@ -51,7 +51,9 @@ tgc_c::tgc_c() {
 tgc_c::~tgc_c() = default;
 
 void tgc_c::reset(uint64_t address) {
-    for(size_t i=0; i<traits<tgc_c>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgc_c>::reg_t),0));
+    auto base_ptr = reinterpret_cast<traits<tgc_c>::reg_t*>(get_regs_base_ptr());
+    for(size_t i=0; i<traits<tgc_c>::NUM_REGS; ++i)
+        *(base_ptr+i)=0;
     reg.PC=address;
     reg.NEXT_PC=reg.PC;
     reg.PRIV=0x3;
diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp
index f515edd..7bbcf36 100644
--- a/src/vm/interp/vm_tgc_c.cpp
+++ b/src/vm/interp/vm_tgc_c.cpp
@@ -180,7 +180,7 @@ private:
         compile_func op;
     };
 
-    const std::array<InstructionDesriptor, 88> instr_descr = {{
+    const std::array<InstructionDesriptor, 89> instr_descr = {{
          /* entries are: size, valid value, valid mask, function ptr */
         /* instruction LUI */
         {32, 0b00000000000000000000000000110111, 0b00000000000000000000000001111111, &this_class::__lui},
@@ -282,6 +282,8 @@ private:
         {32, 0b00000000000000000110000001110011, 0b00000000000000000111000001111111, &this_class::__csrrsi},
         /* instruction CSRRCI */
         {32, 0b00000000000000000111000001110011, 0b00000000000000000111000001111111, &this_class::__csrrci},
+        /* instruction FENCE_I */
+        {32, 0b00000000000000000001000000001111, 0b00000000000000000111000001111111, &this_class::__fence_i},
         /* instruction MUL */
         {32, 0b00000010000000000000000000110011, 0b11111110000000000111000001111111, &this_class::__mul},
         /* instruction MULH */
@@ -2485,8 +2487,8 @@ private:
         return pc;
     }
     
-    /* instruction 50: MUL */
-    compile_ret_t __mul(virt_addr_t& pc, code_word_t instr){
+    /* instruction 50: FENCE_I */
+    compile_ret_t __fence_i(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
         auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
@@ -2496,6 +2498,46 @@ private:
         if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 50);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
+        uint16_t imm = ((bit_sub<20,12>(instr)));
+        if(this->disass_enabled){
+            /* generate console output when executing the command */
+            auto mnemonic = fmt::format(
+                "{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence_i"),
+                fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm));
+            this->core.disass_output(pc.val, mnemonic);
+            
+        }
+        // used registers// calculate next pc value
+        *NEXT_PC = *PC + 4;
+        // execute instruction
+        try {
+        writeSpace2(traits::FENCE, traits::fencei, imm);
+        } catch(...){}
+        // post execution stuff
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 50);
+        // trap check
+        if(*trap_state!=0){
+            super::core.enter_trap(*trap_state, pc.val, instr);
+        } else {
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
+        }
+        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
+        pc.val=*NEXT_PC;
+        return pc;
+    }
+    
+    /* instruction 51: MUL */
+    compile_ret_t __mul(virt_addr_t& pc, code_word_t instr){
+        // pre execution stuff
+        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
+        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
+        *PC=*NEXT_PC;
+        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
+        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 51);
+        uint8_t rd = ((bit_sub<7,5>(instr)));
+        uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -2518,7 +2560,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 50);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 51);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2531,7 +2573,7 @@ private:
         return pc;
     }
     
-    /* instruction 51: MULH */
+    /* instruction 52: MULH */
     compile_ret_t __mulh(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2539,7 +2581,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 51);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 52);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2564,7 +2606,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 51);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 52);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2577,7 +2619,7 @@ private:
         return pc;
     }
     
-    /* instruction 52: MULHSU */
+    /* instruction 53: MULHSU */
     compile_ret_t __mulhsu(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2585,7 +2627,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 52);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 53);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2610,7 +2652,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 52);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 53);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2623,7 +2665,7 @@ private:
         return pc;
     }
     
-    /* instruction 53: MULHU */
+    /* instruction 54: MULHU */
     compile_ret_t __mulhu(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2631,7 +2673,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 53);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 54);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2656,7 +2698,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 53);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 54);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2669,7 +2711,7 @@ private:
         return pc;
     }
     
-    /* instruction 54: DIV */
+    /* instruction 55: DIV */
     compile_ret_t __div(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2677,7 +2719,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 54);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 55);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2706,7 +2748,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 54);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 55);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2719,7 +2761,7 @@ private:
         return pc;
     }
     
-    /* instruction 55: DIVU */
+    /* instruction 56: DIVU */
     compile_ret_t __divu(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2727,7 +2769,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 55);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 56);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2752,7 +2794,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 55);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 56);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2765,7 +2807,7 @@ private:
         return pc;
     }
     
-    /* instruction 56: REM */
+    /* instruction 57: REM */
     compile_ret_t __rem(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2773,7 +2815,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 56);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 57);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2802,7 +2844,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 56);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 57);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2815,7 +2857,7 @@ private:
         return pc;
     }
     
-    /* instruction 57: REMU */
+    /* instruction 58: REMU */
     compile_ret_t __remu(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2823,7 +2865,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 57);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 58);
         uint8_t rd = ((bit_sub<7,5>(instr)));
         uint8_t rs1 = ((bit_sub<15,5>(instr)));
         uint8_t rs2 = ((bit_sub<20,5>(instr)));
@@ -2848,7 +2890,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 57);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 58);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2861,7 +2903,7 @@ private:
         return pc;
     }
     
-    /* instruction 58: CADDI4SPN */
+    /* instruction 59: CADDI4SPN */
     compile_ret_t __caddi4spn(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2869,7 +2911,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 58);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 59);
         uint8_t rd = ((bit_sub<2,3>(instr)));
         uint16_t imm = ((bit_sub<5,1>(instr) << 3) | (bit_sub<6,1>(instr) << 2) | (bit_sub<7,4>(instr) << 6) | (bit_sub<11,2>(instr) << 4));
         if(this->disass_enabled){
@@ -2889,7 +2931,7 @@ private:
         else raise(0,  2);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 58);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 59);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2902,7 +2944,7 @@ private:
         return pc;
     }
     
-    /* instruction 59: CLW */
+    /* instruction 60: CLW */
     compile_ret_t __clw(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2910,7 +2952,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 59);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 60);
         uint8_t rd = ((bit_sub<2,3>(instr)));
         uint8_t uimm = ((bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 2) | (bit_sub<10,3>(instr) << 3));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
@@ -2933,7 +2975,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 59);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 60);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2946,7 +2988,7 @@ private:
         return pc;
     }
     
-    /* instruction 60: CSW */
+    /* instruction 61: CSW */
     compile_ret_t __csw(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2954,7 +2996,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 60);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 61);
         uint8_t rs2 = ((bit_sub<2,3>(instr)));
         uint8_t uimm = ((bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 2) | (bit_sub<10,3>(instr) << 3));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
@@ -2977,7 +3019,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 60);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 61);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -2990,7 +3032,7 @@ private:
         return pc;
     }
     
-    /* instruction 61: CADDI */
+    /* instruction 62: CADDI */
     compile_ret_t __caddi(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -2998,7 +3040,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 61);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 62);
         uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
         uint8_t rs1 = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3017,7 +3059,7 @@ private:
         *(X+rs1) = *(X+rs1) + (int8_t)sext<6>(imm);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 61);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 62);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3030,7 +3072,7 @@ private:
         return pc;
     }
     
-    /* instruction 62: CNOP */
+    /* instruction 63: CNOP */
     compile_ret_t __cnop(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3038,7 +3080,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 62);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 63);
         uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -3053,7 +3095,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 62);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 63);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3066,7 +3108,7 @@ private:
         return pc;
     }
     
-    /* instruction 63: CJAL */
+    /* instruction 64: CJAL */
     compile_ret_t __cjal(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3074,7 +3116,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 63);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 64);
         uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -3095,7 +3137,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 63);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 64);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3108,7 +3150,7 @@ private:
         return pc;
     }
     
-    /* instruction 64: CLI */
+    /* instruction 65: CLI */
     compile_ret_t __cli(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3116,7 +3158,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 64);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 65);
         uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
         uint8_t rd = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3137,7 +3179,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 64);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 65);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3150,7 +3192,7 @@ private:
         return pc;
     }
     
-    /* instruction 65: CLUI */
+    /* instruction 66: CLUI */
     compile_ret_t __clui(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3158,7 +3200,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 65);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 66);
         uint32_t imm = ((bit_sub<2,5>(instr) << 12) | (bit_sub<12,1>(instr) << 17));
         uint8_t rd = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3180,7 +3222,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 65);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 66);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3193,7 +3235,7 @@ private:
         return pc;
     }
     
-    /* instruction 66: CADDI16SP */
+    /* instruction 67: CADDI16SP */
     compile_ret_t __caddi16sp(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3201,7 +3243,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 66);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 67);
         uint16_t nzimm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 7) | (bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 4) | (bit_sub<12,1>(instr) << 9));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -3220,41 +3262,6 @@ private:
         else raise(0,  2);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 66);
-        // trap check
-        if(*trap_state!=0){
-            super::core.enter_trap(*trap_state, pc.val, instr);
-        } else {
-            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
-            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
-        }
-        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
-        pc.val=*NEXT_PC;
-        return pc;
-    }
-    
-    /* instruction 67: __reserved_clui */
-    compile_ret_t ____reserved_clui(virt_addr_t& pc, code_word_t instr){
-        // pre execution stuff
-        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
-        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
-        *PC=*NEXT_PC;
-        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
-        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 67);
-        uint8_t rd = ((bit_sub<7,5>(instr)));
-        if(this->disass_enabled){
-            /* generate console output when executing the command */
-            this->core.disass_output(pc.val, "__reserved_clui");
-            
-        }
-        // used registers// calculate next pc value
-        *NEXT_PC = *PC + 2;
-        // execute instruction
-        try {
-        raise(0,  2);
-        } catch(...){}
-        // post execution stuff
         if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 67);
         // trap check
         if(*trap_state!=0){
@@ -3268,8 +3275,8 @@ private:
         return pc;
     }
     
-    /* instruction 68: CSRLI */
-    compile_ret_t __csrli(virt_addr_t& pc, code_word_t instr){
+    /* instruction 68: __reserved_clui */
+    compile_ret_t ____reserved_clui(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
         auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
@@ -3277,6 +3284,41 @@ private:
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
         if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 68);
+        uint8_t rd = ((bit_sub<7,5>(instr)));
+        if(this->disass_enabled){
+            /* generate console output when executing the command */
+            this->core.disass_output(pc.val, "__reserved_clui");
+            
+        }
+        // used registers// calculate next pc value
+        *NEXT_PC = *PC + 2;
+        // execute instruction
+        try {
+        raise(0,  2);
+        } catch(...){}
+        // post execution stuff
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 68);
+        // trap check
+        if(*trap_state!=0){
+            super::core.enter_trap(*trap_state, pc.val, instr);
+        } else {
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
+        }
+        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
+        pc.val=*NEXT_PC;
+        return pc;
+    }
+    
+    /* instruction 69: CSRLI */
+    compile_ret_t __csrli(virt_addr_t& pc, code_word_t instr){
+        // pre execution stuff
+        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
+        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
+        *PC=*NEXT_PC;
+        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
+        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 69);
         uint8_t shamt = ((bit_sub<2,5>(instr)));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3298,7 +3340,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 68);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 69);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3311,7 +3353,7 @@ private:
         return pc;
     }
     
-    /* instruction 69: CSRAI */
+    /* instruction 70: CSRAI */
     compile_ret_t __csrai(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3319,7 +3361,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 69);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 70);
         uint8_t shamt = ((bit_sub<2,5>(instr)));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3345,7 +3387,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 69);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 70);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3358,7 +3400,7 @@ private:
         return pc;
     }
     
-    /* instruction 70: CANDI */
+    /* instruction 71: CANDI */
     compile_ret_t __candi(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3366,7 +3408,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 70);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 71);
         uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3388,7 +3430,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 70);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 71);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3401,7 +3443,7 @@ private:
         return pc;
     }
     
-    /* instruction 71: CSUB */
+    /* instruction 72: CSUB */
     compile_ret_t __csub(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3409,7 +3451,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 71);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 72);
         uint8_t rs2 = ((bit_sub<2,3>(instr)));
         uint8_t rd = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3431,7 +3473,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 71);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 72);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3444,7 +3486,7 @@ private:
         return pc;
     }
     
-    /* instruction 72: CXOR */
+    /* instruction 73: CXOR */
     compile_ret_t __cxor(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3452,7 +3494,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 72);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 73);
         uint8_t rs2 = ((bit_sub<2,3>(instr)));
         uint8_t rd = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3474,7 +3516,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 72);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 73);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3487,7 +3529,7 @@ private:
         return pc;
     }
     
-    /* instruction 73: COR */
+    /* instruction 74: COR */
     compile_ret_t __cor(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3495,7 +3537,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 73);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 74);
         uint8_t rs2 = ((bit_sub<2,3>(instr)));
         uint8_t rd = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3517,7 +3559,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 73);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 74);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3530,7 +3572,7 @@ private:
         return pc;
     }
     
-    /* instruction 74: CAND */
+    /* instruction 75: CAND */
     compile_ret_t __cand(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3538,7 +3580,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 74);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 75);
         uint8_t rs2 = ((bit_sub<2,3>(instr)));
         uint8_t rd = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3560,7 +3602,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 74);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 75);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3573,7 +3615,7 @@ private:
         return pc;
     }
     
-    /* instruction 75: CJ */
+    /* instruction 76: CJ */
     compile_ret_t __cj(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3581,7 +3623,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 75);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 76);
         uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -3598,7 +3640,7 @@ private:
         pc_assign(*NEXT_PC) = *PC + (int16_t)sext<12>(imm);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 75);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 76);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3611,7 +3653,7 @@ private:
         return pc;
     }
     
-    /* instruction 76: CBEQZ */
+    /* instruction 77: CBEQZ */
     compile_ret_t __cbeqz(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3619,7 +3661,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 76);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 77);
         uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3638,7 +3680,7 @@ private:
         if(*(X+(rs1 + 8)) == 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); 
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 76);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 77);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3651,7 +3693,7 @@ private:
         return pc;
     }
     
-    /* instruction 77: CBNEZ */
+    /* instruction 78: CBNEZ */
     compile_ret_t __cbnez(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3659,7 +3701,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 77);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 78);
         uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8));
         uint8_t rs1 = ((bit_sub<7,3>(instr)));
         if(this->disass_enabled){
@@ -3678,7 +3720,7 @@ private:
         if(*(X+(rs1 + 8)) != 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); 
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 77);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 78);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3691,7 +3733,7 @@ private:
         return pc;
     }
     
-    /* instruction 78: CSLLI */
+    /* instruction 79: CSLLI */
     compile_ret_t __cslli(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3699,7 +3741,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 78);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 79);
         uint8_t nzuimm = ((bit_sub<2,5>(instr)));
         uint8_t rs1 = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3718,7 +3760,7 @@ private:
         if(nzuimm) *(X+rs1) = *(X+rs1) << nzuimm; 
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 78);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 79);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3731,7 +3773,7 @@ private:
         return pc;
     }
     
-    /* instruction 79: CLWSP */
+    /* instruction 80: CLWSP */
     compile_ret_t __clwsp(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3739,7 +3781,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 79);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 80);
         uint8_t uimm = ((bit_sub<2,2>(instr) << 6) | (bit_sub<4,3>(instr) << 2) | (bit_sub<12,1>(instr) << 5));
         uint8_t rd = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3762,7 +3804,7 @@ private:
         else raise(0, 2);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 79);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 80);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3775,7 +3817,7 @@ private:
         return pc;
     }
     
-    /* instruction 80: CMV */
+    /* instruction 81: CMV */
     compile_ret_t __cmv(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3783,7 +3825,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 80);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 81);
         uint8_t rs2 = ((bit_sub<2,5>(instr)));
         uint8_t rd = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3802,7 +3844,7 @@ private:
         if(rd != 0) *(X+rd) = *(X+rs2); 
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 80);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 81);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3815,7 +3857,7 @@ private:
         return pc;
     }
     
-    /* instruction 81: CJR */
+    /* instruction 82: CJR */
     compile_ret_t __cjr(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3823,7 +3865,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 81);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 82);
         uint8_t rs1 = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -3842,40 +3884,6 @@ private:
         else raise(0, 2);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 81);
-        // trap check
-        if(*trap_state!=0){
-            super::core.enter_trap(*trap_state, pc.val, instr);
-        } else {
-            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
-            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
-        }
-        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
-        pc.val=*NEXT_PC;
-        return pc;
-    }
-    
-    /* instruction 82: __reserved_cmv */
-    compile_ret_t ____reserved_cmv(virt_addr_t& pc, code_word_t instr){
-        // pre execution stuff
-        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
-        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
-        *PC=*NEXT_PC;
-        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
-        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 82);
-        if(this->disass_enabled){
-            /* generate console output when executing the command */
-            this->core.disass_output(pc.val, "__reserved_cmv");
-            
-        }
-        // used registers// calculate next pc value
-        *NEXT_PC = *PC + 2;
-        // execute instruction
-        try {
-        raise(0, 2);
-        } catch(...){}
-        // post execution stuff
         if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 82);
         // trap check
         if(*trap_state!=0){
@@ -3889,8 +3897,8 @@ private:
         return pc;
     }
     
-    /* instruction 83: CADD */
-    compile_ret_t __cadd(virt_addr_t& pc, code_word_t instr){
+    /* instruction 83: __reserved_cmv */
+    compile_ret_t ____reserved_cmv(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
         auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
@@ -3898,6 +3906,40 @@ private:
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
         if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 83);
+        if(this->disass_enabled){
+            /* generate console output when executing the command */
+            this->core.disass_output(pc.val, "__reserved_cmv");
+            
+        }
+        // used registers// calculate next pc value
+        *NEXT_PC = *PC + 2;
+        // execute instruction
+        try {
+        raise(0, 2);
+        } catch(...){}
+        // post execution stuff
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 83);
+        // trap check
+        if(*trap_state!=0){
+            super::core.enter_trap(*trap_state, pc.val, instr);
+        } else {
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
+        }
+        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
+        pc.val=*NEXT_PC;
+        return pc;
+    }
+    
+    /* instruction 84: CADD */
+    compile_ret_t __cadd(virt_addr_t& pc, code_word_t instr){
+        // pre execution stuff
+        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
+        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
+        *PC=*NEXT_PC;
+        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
+        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 84);
         uint8_t rs2 = ((bit_sub<2,5>(instr)));
         uint8_t rd = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
@@ -3916,7 +3958,7 @@ private:
         if(rd != 0) *(X+rd) = *(X+rd) + *(X+rs2); 
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 83);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 84);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -3929,7 +3971,7 @@ private:
         return pc;
     }
     
-    /* instruction 84: CJALR */
+    /* instruction 85: CJALR */
     compile_ret_t __cjalr(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -3937,7 +3979,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 84);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 85);
         uint8_t rs1 = ((bit_sub<7,5>(instr)));
         if(this->disass_enabled){
             /* generate console output when executing the command */
@@ -3959,40 +4001,6 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 84);
-        // trap check
-        if(*trap_state!=0){
-            super::core.enter_trap(*trap_state, pc.val, instr);
-        } else {
-            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
-            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
-        }
-        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
-        pc.val=*NEXT_PC;
-        return pc;
-    }
-    
-    /* instruction 85: CEBREAK */
-    compile_ret_t __cebreak(virt_addr_t& pc, code_word_t instr){
-        // pre execution stuff
-        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
-        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
-        *PC=*NEXT_PC;
-        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
-        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 85);
-        if(this->disass_enabled){
-            /* generate console output when executing the command */
-            this->core.disass_output(pc.val, "cebreak");
-            
-        }
-        // used registers// calculate next pc value
-        *NEXT_PC = *PC + 2;
-        // execute instruction
-        try {
-        raise(0,  3);
-        } catch(...){}
-        // post execution stuff
         if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 85);
         // trap check
         if(*trap_state!=0){
@@ -4006,8 +4014,8 @@ private:
         return pc;
     }
     
-    /* instruction 86: CSWSP */
-    compile_ret_t __cswsp(virt_addr_t& pc, code_word_t instr){
+    /* instruction 86: CEBREAK */
+    compile_ret_t __cebreak(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
         auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
@@ -4015,6 +4023,40 @@ private:
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
         if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 86);
+        if(this->disass_enabled){
+            /* generate console output when executing the command */
+            this->core.disass_output(pc.val, "cebreak");
+            
+        }
+        // used registers// calculate next pc value
+        *NEXT_PC = *PC + 2;
+        // execute instruction
+        try {
+        raise(0,  3);
+        } catch(...){}
+        // post execution stuff
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 86);
+        // trap check
+        if(*trap_state!=0){
+            super::core.enter_trap(*trap_state, pc.val, instr);
+        } else {
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::ICOUNT]))++;
+            (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::INSTRET]))++;
+        }
+        (*reinterpret_cast<uint64_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::CYCLE]))++;
+        pc.val=*NEXT_PC;
+        return pc;
+    }
+    
+    /* instruction 87: CSWSP */
+    compile_ret_t __cswsp(virt_addr_t& pc, code_word_t instr){
+        // pre execution stuff
+        auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
+        auto NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
+        *PC=*NEXT_PC;
+        auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
+        *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 87);
         uint8_t rs2 = ((bit_sub<2,5>(instr)));
         uint8_t uimm = ((bit_sub<7,2>(instr) << 6) | (bit_sub<9,4>(instr) << 2));
         if(this->disass_enabled){
@@ -4036,7 +4078,7 @@ private:
         }
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 86);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 87);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);
@@ -4049,7 +4091,7 @@ private:
         return pc;
     }
     
-    /* instruction 87: DII */
+    /* instruction 88: DII */
     compile_ret_t __dii(virt_addr_t& pc, code_word_t instr){
         // pre execution stuff
         auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
@@ -4057,7 +4099,7 @@ private:
         *PC=*NEXT_PC;
         auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
         *trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
-        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 87);
+        if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, 88);
         if(this->disass_enabled){
             /* generate console output when executing the command */
             this->core.disass_output(pc.val, "dii");
@@ -4070,7 +4112,7 @@ private:
         raise(0,  2);
         } catch(...){}
         // post execution stuff
-        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 87);
+        if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 88);
         // trap check
         if(*trap_state!=0){
             super::core.enter_trap(*trap_state, pc.val, instr);