From 0e88664ff7a38943c370c4a1b6b090fedce1f6cc Mon Sep 17 00:00:00 2001 From: Eyck-Alexander Jentzsch Date: Mon, 21 Oct 2024 16:46:10 +0200 Subject: [PATCH] adds better tohost writing implementation, allowing the standard riscv-isa-test benchmarks to run --- src/iss/arch/riscv_hart_m_p.h | 128 +++++++++++++++++++--------------- 1 file changed, 73 insertions(+), 55 deletions(-) diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index b50da48..9e8db83 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -354,7 +354,7 @@ protected: using csr_page_type = typename csr_type::page_type; mem_type mem; csr_type csr; - std::stringstream uart_buf; + std::stringstream io_buf; std::unordered_map ptw; std::unordered_map atomic_reservation; std::unordered_map csr_rd_cb; @@ -446,7 +446,7 @@ riscv_hart_m_p::riscv_hart_m_p(feature_config cfg) csr[marchid] = traits::MARCHID_VAL; csr[mimpid] = 1; - uart_buf.str(""); + io_buf.str(""); if(traits::FLEN > 0) { csr_rd_cb[fcsr] = &this_class::read_fcsr; csr_wr_cb[fcsr] = &this_class::write_fcsr; @@ -756,10 +756,10 @@ iss::status riscv_hart_m_p::write(const address_type type, c switch(addr) { case 0x10013000: // UART0 base, TXFIFO reg case 0x10023000: // UART1 base, TXFIFO reg - uart_buf << (char)data[0]; + io_buf << (char)data[0]; if(((char)data[0]) == '\n' || data[0] == 0) { - std::cout << uart_buf.str(); - uart_buf.str(""); + std::cout << io_buf.str(); + io_buf.str(""); } return iss::Ok; case 0x10008000: { // HFROSC base, hfrosccfg reg @@ -1094,59 +1094,77 @@ iss::status riscv_hart_m_p::read_mem(phys_addr_t paddr, unsi template iss::status riscv_hart_m_p::write_mem(phys_addr_t paddr, unsigned length, const uint8_t* const data) { - switch(paddr.val) { - // TODO remove UART, Peripherals should not be part of the ISS - case 0xFFFF0000: // UART0 base, TXFIFO reg - if(((char)data[0]) == '\n' || data[0] == 0) { - CPPLOG(INFO) << "UART" << ((paddr.val >> 12) & 0x3) << " send '" << uart_buf.str() << "'"; - uart_buf.str(""); - } else if(((char)data[0]) != '\r') - uart_buf << (char)data[0]; - break; - default: { - mem_type::page_type& p = mem(paddr.val / mem.page_size); - std::copy(data, data + length, p.data() + (paddr.val & mem.page_addr_mask)); - // tohost handling in case of riscv-test - if(paddr.access && iss::access_type::FUNC) { - auto tohost_upper = - (traits::XLEN == 32 && paddr.val == (tohost + 4)) || (traits::XLEN == 64 && paddr.val == tohost); - auto tohost_lower = (traits::XLEN == 32 && paddr.val == tohost) || (traits::XLEN == 64 && paddr.val == tohost); - if(tohost_lower || tohost_upper) { - uint64_t hostvar = *reinterpret_cast(p.data() + (tohost & mem.page_addr_mask)); - // in case of 32 bit system, two writes to tohost are needed, only evaluate on the second (high) write - if(tohost_upper && (tohost_lower || tohost_lower_written)) { - switch(hostvar >> 48) { - case 0: - if(hostvar != 0x1) { - CPPLOG(FATAL) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; - } else { - CPPLOG(INFO) << "tohost value is 0x" << std::hex << hostvar << std::dec << " (" << hostvar - << "), stopping simulation"; - } - this->reg.trap_state = std::numeric_limits::max(); - this->interrupt_sim = hostvar; - break; - case 0x0101: { - char c = static_cast(hostvar & 0xff); - if(c == '\n' || c == 0) { - CPPLOG(INFO) << "tohost send '" << uart_buf.str() << "'"; - uart_buf.str(""); - } else - uart_buf << c; - } break; - default: - break; + mem_type::page_type& p = mem(paddr.val / mem.page_size); + std::copy(data, data + length, p.data() + (paddr.val & mem.page_addr_mask)); + // tohost handling in case of riscv-test + // according to https://github.com/riscv-software-src/riscv-isa-sim/issues/364#issuecomment-607657754: + if(paddr.access && iss::access_type::FUNC) { + if(paddr.val == tohost) { + if(traits::XLEN == 32) + tohost &= 0x00000000ffffffff; + // Extract Device (bits 63:56) + uint8_t device = (tohost >> 56) & 0xFF; + // Extract Command (bits 55:48) + uint8_t command = (tohost >> 48) & 0xFF; + // Extract payload (bits 47:0) + uint64_t payload = tohost & 0xFFFFFFFFFFFFULL; + if(payload & 1) { + CPPLOG(FATAL) << "tohost value is 0x" << std::hex << payload << std::dec << " (" << payload << "), stopping simulation"; + this->reg.trap_state = std::numeric_limits::max(); + this->interrupt_sim = payload; + return iss::Ok; + } else if(device == 0 && command == 0) { + reg_t payload_addr; + // payload contains the addr of the struct containing information about the syscall + read(address_type::PHYSICAL, access_type::READ, traits::MEM, payload, sizeof(reg_t), + reinterpret_cast(&payload_addr)); + // If the payload_addr is missaligned end simulation + if(payload_addr & 1) { + CPPLOG(FATAL) << "tohost payload value is 0x" << std::hex << payload_addr << std::dec << " (" << payload_addr + << "), stopping simulation"; + this->reg.trap_state = std::numeric_limits::max(); + this->interrupt_sim = payload; + return iss::Ok; + } + // read the entire struct into an array + reg_t loaded_payload[8]; + read(address_type::PHYSICAL, access_type::READ, traits::MEM, payload_addr, sizeof(loaded_payload), + reinterpret_cast(loaded_payload)); + reg_t syscall_no = loaded_payload[0]; + if(syscall_no == 64) { // SYS_WRITE + reg_t fd = loaded_payload[1]; + reg_t buf_ptr = loaded_payload[2]; + reg_t len = loaded_payload[3]; + std::vector buf(len); + read(address_type::PHYSICAL, access_type::READ, traits::MEM, buf_ptr, len, + reinterpret_cast(buf.data())); + // we disregard the fd and just log to stdout + for(size_t i = 0; i < len; i++) { + io_buf << buf[i]; } - tohost_lower_written = false; - } else if(tohost_lower) - tohost_lower_written = true; - } else if((traits::XLEN == 32 && paddr.val == fromhost + 4) || (traits::XLEN == 64 && paddr.val == fromhost)) { - uint64_t fhostvar = *reinterpret_cast(p.data() + (fromhost & mem.page_addr_mask)); - *reinterpret_cast(p.data() + (tohost & mem.page_addr_mask)) = fhostvar; + CPPLOG(INFO) << "tohost send '" << io_buf.str() << "'"; + io_buf.str(""); + // Not sure what the correct return value should be + uint8_t ret_val = 1; + write(address_type::PHYSICAL, access_type::WRITE, traits::MEM, fromhost, 1, &ret_val); + } else { + CPPLOG(ERR) << "tohost syscall with number " << std::hex << syscall_no << std::dec << " (" << syscall_no + << ") not implemented"; + this->reg.trap_state = std::numeric_limits::max(); + this->interrupt_sim = payload; + return iss::Ok; + } + } else { + CPPLOG(ERR) << "tohost functionality not implemented for device " << device << " and command " << command; + this->reg.trap_state = std::numeric_limits::max(); + this->interrupt_sim = payload; + return iss::Ok; } } - } + if((traits::XLEN == 32 && paddr.val == fromhost + 4) || (traits::XLEN == 64 && paddr.val == fromhost)) { + uint64_t fhostvar = *reinterpret_cast(p.data() + (fromhost & mem.page_addr_mask)); + *reinterpret_cast(p.data() + (tohost & mem.page_addr_mask)) = fhostvar; + } } return iss::Ok; }