From 0bf4933372da30e1e6b2c444e7a0248029af3cd7 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Sat, 28 Jul 2018 10:02:28 +0200 Subject: [PATCH] Added link to original repo --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index e14e3f5..edf6abe 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,5 @@ # DBT-RISE-RISCV -Am instruction set simulator based on DBT-RISE implementing the RISC-V ISA +Am instruction set simulator based on DBT-RISE implementing the RISC-V ISA. The project is hosted at https://git.minres.com/DBT-RISE/DBT-RISE-RISCV. **DBT-RISE-RISCV README**