Browse Source

Cleanup of SC wrapper

Eyck Jentzsch 1 year ago
parent
commit
292e2dbb89
2 changed files with 10 additions and 10 deletions
  1. 1
    1
      dbt-core
  2. 9
    9
      riscv.sc/src/sysc/core_complex.cpp

+ 1
- 1
dbt-core

@@ -1 +1 @@
1
-Subproject commit d9512853b22e869938013c8dc0c6678a92d52c0e
1
+Subproject commit 555bff0a20cfbf775994ed74b188b9af480df883

+ 9
- 9
riscv.sc/src/sysc/core_complex.cpp View File

@@ -103,7 +103,9 @@ public:
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     base_type::hart_state<base_type::reg_t>& get_state() { return this->state; }
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-    void notify_phase(exec_phase) override;
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+    void notify_phase(exec_phase p) override {
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+        if(p == ISTART) owner->sync(this->reg.icount+cycle_offset);
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+    }
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     sync_type needed_sync() const override { return PRE_SYNC; }
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@@ -131,9 +133,12 @@ public:
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     		return owner->write_mem_dbg(addr.val, length, data) ? Ok : Err;
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     	else{
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     		auto res = owner->write_mem(addr.val, length, data) ? Ok : Err;
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-    		// TODO: this is an ugly hack (clear MTIP on mtimecmp write), needs to be fixed
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-    		if(addr.val==0x2004000)
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-    			this->csr[arch::mip] &= ~(1ULL<<7);
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+    		// clear MTIP on mtimecmp write
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+    		if(addr.val==0x2004000){
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+    		    reg_t val;
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+    		    this->read_csr(arch::mip, val);
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+    			this->write_csr(arch::mip, val & ~(1ULL<<7));
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+    		}
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     		return res;
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     	}
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     }
@@ -198,11 +203,6 @@ int cmd_sysc(int argc, char* argv[], debugger::out_func of, debugger::data_func
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 }
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-void core_wrapper::notify_phase(exec_phase p) {
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-    if(p == ISTART)
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-        owner->sync(this->reg.icount+cycle_offset);
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-}
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-
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 core_complex::core_complex(sc_core::sc_module_name name)
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 : sc_core::sc_module(name)
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 , NAMED(initiator)