Browse Source

Back-ported DVCon turorial changes

Eyck Jentzsch 9 months ago
parent
commit
20b3665003
86 changed files with 429483 additions and 4419 deletions
  1. 24
    18
      .cproject
  2. 55
    0
      CMakeLists.txt
  3. 2
    2
      README.md
  4. 423701
    0
      callgrind.out.2141
  5. 1
    1
      dbt-core
  6. 31
    0
      etc/cmake.sh
  7. 1
    1
      external/CMakeLists.txt
  8. 31
    0
      html/app.js
  9. 2
    3
      html/ws.html
  10. 8
    52
      platform/CMakeLists.txt
  11. 4
    3
      platform/gen_input/fe310.rdl
  12. 96
    0
      platform/gen_input/pwm.rdl
  13. 32
    36
      platform/incl/sysc/SiFive/aon.h
  14. 33
    37
      platform/incl/sysc/SiFive/clint.h
  15. 106
    0
      platform/incl/sysc/SiFive/fe310.h
  16. 67
    77
      platform/incl/sysc/SiFive/gen/aon_regs.h
  17. 42
    52
      platform/incl/sysc/SiFive/gen/clint_regs.h
  18. 19
    15
      platform/incl/sysc/SiFive/gen/e300_plat_t.h
  19. 76
    65
      platform/incl/sysc/SiFive/gen/gpio_regs.h
  20. 46
    56
      platform/incl/sysc/SiFive/gen/plic_regs.h
  21. 56
    66
      platform/incl/sysc/SiFive/gen/prci_regs.h
  22. 129
    0
      platform/incl/sysc/SiFive/gen/pwm_regs.h
  23. 85
    95
      platform/incl/sysc/SiFive/gen/spi_regs.h
  24. 59
    69
      platform/incl/sysc/SiFive/gen/uart_regs.h
  25. 44
    48
      platform/incl/sysc/SiFive/gpio.h
  26. 0
    101
      platform/incl/sysc/SiFive/hifive1.h
  27. 32
    37
      platform/incl/sysc/SiFive/plic.h
  28. 33
    37
      platform/incl/sysc/SiFive/prci.h
  29. 79
    0
      platform/incl/sysc/SiFive/pwm.h
  30. 66
    59
      platform/incl/sysc/SiFive/spi.h
  31. 38
    42
      platform/incl/sysc/SiFive/uart.h
  32. 73
    72
      platform/incl/sysc/sc_comm_singleton.h
  33. 42
    20
      platform/incl/sysc/tlm_extensions.h
  34. 85
    59
      platform/incl/sysc/top/BLDC.h
  35. 41
    11
      platform/incl/sysc/top/dcmotor.h
  36. 35
    8
      platform/incl/sysc/top/h_bridge.h
  37. 68
    0
      platform/incl/sysc/top/hifive1.h
  38. 0
    47
      platform/incl/sysc/top/mcp3008.h
  39. 120
    0
      platform/incl/sysc/top/mcp_adc.h
  40. 39
    19
      platform/incl/sysc/top/system.h
  41. 38
    13
      platform/incl/sysc/top/terminal.h
  42. 112
    0
      platform/src/CLIParser.cpp
  43. 60
    0
      platform/src/CLIParser.h
  44. 31
    11
      platform/src/CMakeLists.txt
  45. 89
    133
      platform/src/sc_main.cpp
  46. 77
    53
      platform/src/sysc/BLDC.cpp
  47. 44
    49
      platform/src/sysc/aon.cpp
  48. 51
    51
      platform/src/sysc/clint.cpp
  49. 77
    32
      platform/src/sysc/dcmotor.cpp
  50. 194
    0
      platform/src/sysc/fe310.cpp
  51. 122
    145
      platform/src/sysc/gpio.cpp
  52. 75
    19
      platform/src/sysc/h_bridge.cpp
  53. 104
    138
      platform/src/sysc/hifive1.cpp
  54. 0
    86
      platform/src/sysc/mcp3008.cpp
  55. 202
    0
      platform/src/sysc/mcp_adc.cpp
  56. 65
    76
      platform/src/sysc/plic.cpp
  57. 62
    64
      platform/src/sysc/prci.cpp
  58. 231
    0
      platform/src/sysc/pwm.cpp
  59. 117
    132
      platform/src/sysc/sc_comm_singleton.cpp
  60. 187
    135
      platform/src/sysc/spi.cpp
  61. 81
    54
      platform/src/sysc/system.cpp
  62. 51
    33
      platform/src/sysc/terminal.cpp
  63. 93
    96
      platform/src/sysc/uart.cpp
  64. 16
    43
      riscv.sc/CMakeLists.txt
  65. 44
    48
      riscv.sc/incl/sysc/core_complex.h
  66. 172
    174
      riscv.sc/src/core_complex.cpp
  67. 0
    17
      riscv/.project
  68. 0
    1
      riscv/.settings/.gitignore
  69. 0
    27
      riscv/CMakeLists.txt
  70. 6
    6
      riscv/gen_input/RV32IBase.core_desc
  71. 42
    47
      riscv/gen_input/templates/vm_riscv.in.cpp
  72. 151
    139
      riscv/incl/iss/arch/riscv_hart_msu_vp.h
  73. 2
    1
      riscv/incl/iss/arch/rv32gc.h
  74. 78
    77
      riscv/incl/iss/arch/rv32imac.h
  75. 3
    2
      riscv/incl/iss/arch/rv64ia.h
  76. 92
    66
      riscv/incl/iss/debugger/riscv_target_adapter.h
  77. 18
    18
      riscv/incl/iss/plugin/cycle_estimate.h
  78. 20
    19
      riscv/incl/iss/plugin/instruction_count.h
  79. 11
    10
      riscv/src/CMakeLists.txt
  80. 459
    468
      riscv/src/internal/vm_rv32gc.cpp
  81. 322
    336
      riscv/src/internal/vm_rv32imac.cpp
  82. 282
    288
      riscv/src/internal/vm_rv64ia.cpp
  83. 39
    36
      riscv/src/iss/rv32imac.cpp
  84. 61
    64
      riscv/src/main.cpp
  85. 1
    1
      sc-components
  86. 0
    3
      softfloat/CMakeLists.txt

+ 24
- 18
.cproject View File

@@ -70,7 +70,7 @@
70 70
 				</extensions>
71 71
 			</storageModule>
72 72
 			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
73
-				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="cdt.managedbuild.config.gnu.exe.release.1745230171" name="Release" optionalBuildProperties="org.eclipse.cdt.docker.launcher.containerbuild.property.volumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.selectedvolumes=" parent="cdt.managedbuild.config.gnu.exe.release">
73
+				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="cdt.managedbuild.config.gnu.exe.release.1745230171" name="Release" optionalBuildProperties="org.eclipse.cdt.docker.launcher.containerbuild.property.selectedvolumes=,org.eclipse.cdt.docker.launcher.containerbuild.property.volumes=" parent="cdt.managedbuild.config.gnu.exe.release">
74 74
 					<folderInfo id="cdt.managedbuild.config.gnu.exe.release.1745230171." name="/" resourcePath="">
75 75
 						<toolChain id="cdt.managedbuild.toolchain.gnu.exe.release.2006835092" name="Linux GCC" superClass="cdt.managedbuild.toolchain.gnu.exe.release">
76 76
 							<targetPlatform binaryParser="org.eclipse.cdt.core.GNU_ELF;org.eclipse.cdt.core.ELF" id="cdt.managedbuild.target.gnu.platform.exe.release.1630517313" name="Debug Platform" superClass="cdt.managedbuild.target.gnu.platform.exe.release"/>
@@ -171,6 +171,23 @@
171 171
 	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
172 172
 		<project id="DBT-RISE-RISCV.cdt.managedbuild.target.gnu.exe.1695631616" name="Executable" projectType="cdt.managedbuild.target.gnu.exe"/>
173 173
 	</storageModule>
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+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
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+	<storageModule moduleId="refreshScope" versionNumber="2">
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+		<configuration configurationName="RelWithDebInfo">
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+			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
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+		</configuration>
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+		<configuration configurationName="Default">
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+			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
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+		</configuration>
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+		<configuration configurationName="Debug">
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+			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
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+		</configuration>
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+		<configuration configurationName="Release">
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+			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
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+		</configuration>
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+	</storageModule>
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+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
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+	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
174 191
 	<storageModule moduleId="scannerConfiguration">
175 192
 		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
176 193
 		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.debug.119132886.1995486963;cdt.managedbuild.config.gnu.exe.debug.119132886.1995486963.;cdt.managedbuild.tool.gnu.cpp.compiler.base.64491626;cdt.managedbuild.tool.gnu.cpp.compiler.input.550087631">
@@ -215,6 +232,9 @@
215 232
 		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.release.1745230171;cdt.managedbuild.config.gnu.exe.release.1745230171.;cdt.managedbuild.tool.gnu.cpp.compiler.exe.release.187095968;cdt.managedbuild.tool.gnu.cpp.compiler.input.1317114938">
216 233
 			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
217 234
 		</scannerConfigBuildInfo>
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+		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404;cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404.;cdt.managedbuild.tool.gnu.cpp.compiler.exe.release.1556984395;cdt.managedbuild.tool.gnu.cpp.compiler.input.228859511">
236
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
237
+		</scannerConfigBuildInfo>
218 238
 		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.debug.119132886.1763523931;cdt.managedbuild.config.gnu.exe.debug.119132886.1763523931.;cdt.managedbuild.tool.gnu.c.compiler.base.1252259913;cdt.managedbuild.tool.gnu.c.compiler.input.1578289923">
219 239
 			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
220 240
 		</scannerConfigBuildInfo>
@@ -224,25 +244,11 @@
224 244
 		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.release.446935686;cdt.managedbuild.config.gnu.exe.release.446935686.;cdt.managedbuild.tool.gnu.cpp.compiler.exe.release.1265053613;cdt.managedbuild.tool.gnu.cpp.compiler.input.1842530130">
225 245
 			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
226 246
 		</scannerConfigBuildInfo>
247
+		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404;cdt.managedbuild.config.gnu.exe.release.1745230171.1259602404.;cdt.managedbuild.tool.gnu.c.compiler.exe.release.1020243188;cdt.managedbuild.tool.gnu.c.compiler.input.693742822">
248
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
249
+		</scannerConfigBuildInfo>
227 250
 		<scannerConfigBuildInfo instanceId="cdt.managedbuild.config.gnu.exe.debug.1751741082;cdt.managedbuild.config.gnu.exe.debug.1751741082.;cdt.managedbuild.tool.gnu.c.compiler.exe.debug.1306991179;cdt.managedbuild.tool.gnu.c.compiler.input.140891728">
228 251
 			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
229 252
 		</scannerConfigBuildInfo>
230 253
 	</storageModule>
231
-	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
232
-	<storageModule moduleId="refreshScope" versionNumber="2">
233
-		<configuration configurationName="RelWithDebInfo">
234
-			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
235
-		</configuration>
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-		<configuration configurationName="Default">
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-			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
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-		</configuration>
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-		<configuration configurationName="Debug">
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-			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
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-		</configuration>
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-		<configuration configurationName="Release">
243
-			<resource resourceType="PROJECT" workspacePath="/DBT-RISE-RISCV"/>
244
-		</configuration>
245
-	</storageModule>
246
-	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
247
-	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
248 254
 </cproject>

+ 55
- 0
CMakeLists.txt View File

@@ -1,8 +1,17 @@
1 1
 cmake_minimum_required(VERSION 3.3)
2 2
 set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} ${CMAKE_CURRENT_SOURCE_DIR}/cmake ${CMAKE_CURRENT_SOURCE_DIR}/sc-components/cmake)
3 3
 
4
+set(ENABLE_SCV TRUE CACHE BOOL "Enable use of SCV")
5
+
4 6
 include(GitFunctions)
5 7
 get_branch_from_git()
8
+# if we are not on master or develop set the submodules to develop
9
+IF(NOT ${GIT_BRANCH} MATCHES "master") 
10
+	IF(NOT ${GIT_BRANCH} MATCHES "develop") 
11
+		message(STATUS "main branch is '${GIT_BRANCH}', setting submodules to 'develop'")
12
+		set(GIT_BRANCH develop)
13
+	endif()
14
+endif()
6 15
 
7 16
 ### set the directory names of the submodules
8 17
 set(GIT_SUBMODULES elfio libGIS sc-components dbt-core)
@@ -45,12 +54,58 @@ endif()
45 54
 
46 55
 setup_conan()
47 56
 
57
+# This line finds the boost lib and headers. 
58
+set(Boost_NO_BOOST_CMAKE ON) #  Don't do a find_package in config mode before searching for a regular boost install.
59
+find_package(Boost COMPONENTS program_options system thread filesystem REQUIRED)
60
+
61
+if(DEFINED ENV{LLVM_HOME})
62
+	find_path (LLVM_DIR LLVM-Config.cmake $ENV{LLVM_HOME}/lib/cmake/llvm)
63
+endif(DEFINED ENV{LLVM_HOME})
64
+find_package(LLVM REQUIRED CONFIG)
65
+message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}")
66
+message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}")
67
+llvm_map_components_to_libnames(llvm_libs support core mcjit x86codegen x86asmparser)
68
+
48 69
 find_package(Threads)
49 70
 find_package(Tcmalloc)
71
+find_package(ZLIB)
72
+find_package(SystemC)
73
+if(SystemC_FOUND)
74
+        message(STATUS "SystemC headers at ${SystemC_INCLUDE_DIRS}")
75
+        message(STATUS "SystemC library at ${SystemC_LIBRARY_DIRS}")
76
+        if(SCV_FOUND)
77
+            message(STATUS "SCV headers at ${SCV_INCLUDE_DIRS}")
78
+            message(STATUS "SCV library at ${SCV_LIBRARY_DIRS}")
79
+        endif(SCV_FOUND)
80
+        if(CCI_FOUND)
81
+            message(STATUS "CCI headers at ${CCI_INCLUDE_DIRS}")
82
+            message(STATUS "CCI library at ${CCI_LIBRARY_DIRS}")
83
+        endif()
84
+endif(SystemC_FOUND)
50 85
 
51 86
 set(PROJECT_3PARTY_DIRS external)
52 87
 include(clang-format)
53 88
 
89
+set(ENABLE_CLANG_TIDY OFF CACHE BOOL "Add clang-tidy automatically to builds")
90
+if (ENABLE_CLANG_TIDY)
91
+    find_program (CLANG_TIDY_EXE NAMES "clang-tidy" PATHS /usr/local/opt/llvm/bin )
92
+    if (CLANG_TIDY_EXE)
93
+        message(STATUS "clang-tidy found: ${CLANG_TIDY_EXE}")
94
+        set(CLANG_TIDY_CHECKS "-*,modernize-*")
95
+        set(CMAKE_CXX_CLANG_TIDY "${CLANG_TIDY_EXE};-checks=${CLANG_TIDY_CHECKS};-header-filter='${CMAKE_SOURCE_DIR}/*';-fix"
96
+            CACHE STRING "" FORCE)
97
+    else()
98
+        message(AUTHOR_WARNING "clang-tidy not found!")
99
+        set(CMAKE_CXX_CLANG_TIDY "" CACHE STRING "" FORCE) # delete it
100
+    endif()
101
+endif()
102
+  
103
+# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0)
104
+set(VERSION_MAJOR "1")
105
+set(VERSION_MINOR "0")
106
+set(VERSION_PATCH "0")
107
+set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH})
108
+
54 109
 add_subdirectory(external)
55 110
 add_subdirectory(dbt-core)
56 111
 add_subdirectory(sc-components)

+ 2
- 2
README.md View File

@@ -25,8 +25,8 @@ DBT-RISE-RISCV uses libGIS (https://github.com/vsergeev/libGIS) as well as ELFIO
25 25
 
26 26
 **Quick start**
27 27
 
28
-* you need to have a decent compiler, make, python, and cmake installed
29
-* install LLVM 4.0 according to http://apt.llvm.org/ (if it is not already provided by your distribution e.g by Ubuntu 17.04)
28
+* you need to have a C++11 capable compiler, make, python, and cmake installed
29
+* install LLVM >= 4.0 according to http://apt.llvm.org/ (if it is not already provided by your distribution e.g by Ubuntu 18.04)
30 30
 * install conan.io (see also http://docs.conan.io/en/latest/installation.html):
31 31
 ```
32 32
     pip install conan

+ 423701
- 0
callgrind.out.2141
File diff suppressed because it is too large
View File


+ 1
- 1
dbt-core

@@ -1 +1 @@
1
-Subproject commit 31263d4aaa6a7f01914c2decead091dc968f30d3
1
+Subproject commit 54cf894c3f3897a57f366905345514f5e94a5166

+ 31
- 0
etc/cmake.sh View File

@@ -1,4 +1,35 @@
1 1
 #!/bin/sh
2
+#******************************************************************************
3
+# Copyright (C) 2018 MINRES Technologies GmbH
4
+# All rights reserved.
5
+#
6
+# Redistribution and use in source and binary forms, with or without
7
+# modification, are permitted provided that the following conditions are met:
8
+#
9
+# 1. Redistributions of source code must retain the above copyright notice,
10
+#    this list of conditions and the following disclaimer.
11
+#
12
+# 2. Redistributions in binary form must reproduce the above copyright notice,
13
+#    this list of conditions and the following disclaimer in the documentation
14
+#    and/or other materials provided with the distribution.
15
+#
16
+# 3. Neither the name of the copyright holder nor the names of its contributors
17
+#    may be used to endorse or promote products derived from this software
18
+#    without specific prior written permission.
19
+#
20
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
24
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30
+# POSSIBILITY OF SUCH DAMAGE.
31
+#
32
+#******************************************************************************/
2 33
 ##
3 34
 
4 35
 if [ -n "$1" ]; then

+ 1
- 1
external/CMakeLists.txt View File

@@ -7,7 +7,7 @@ project("external")
7 7
 include(Common)
8 8
 
9 9
 
10
-include_directories( ${PROJECT_SOURCE_DIR}/external/libGIS )
10
+include_directories( ${PROJECT_SOURCE_DIR}/libGIS )
11 11
 
12 12
 FILE(GLOB ElfioHeaders elfio *.hpp)
13 13
 FILE(GLOB GISHeaders libGis *.h)

+ 31
- 0
html/app.js View File

@@ -1,3 +1,34 @@
1
+/*******************************************************************************
2
+ * Copyright (C) 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
1 32
 var ws;
2 33
 
3 34
 $(function() {

+ 2
- 3
html/ws.html View File

@@ -79,7 +79,7 @@ span.value_x { background-color: red;}
79 79
 			}
80 80
 		}
81 81
 		var open_connection = function(name){
82
-			var s = new WebSocket('ws://'+window.location.host+'/ws/i_simple_system.i_'+name);
82
+			var s = new WebSocket('ws://'+window.location.host+'/ws/i_system.i_hifive1.i_'+name);
83 83
 			s.addEventListener('error',   function (m) { log(name, new Date().toISOString()+': ===connection error ==='); });
84 84
 			s.addEventListener('open',    function (m) { log(name, new Date().toISOString()+': ===connection opened==='); });
85 85
 			s.addEventListener('message', function (m) { log(name, m.data); });
@@ -99,8 +99,7 @@ span.value_x { background-color: red;}
99 99
 			top.appendChild(div);
100 100
 			open_connection(n);
101 101
 		}
102
-		createElem("uart0");
103
-		createElem("gpio0");
102
+		createElem("terminal");
104 103
 		</script>
105 104
 	</body>
106 105
 </html>

+ 8
- 52
platform/CMakeLists.txt View File

@@ -8,63 +8,19 @@ set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
8 8
 set(CMAKE_LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/lib")
9 9
 
10 10
 # Set the name of your project here
11
-project("riscv.sc")
12
-
13
-# Set the version number of your project here (format is MAJOR.MINOR.PATCHLEVEL - e.g. 1.0.0)
14
-set(VERSION_MAJOR "0")
15
-set(VERSION_MINOR "0")
16
-set(VERSION_PATCH "1")
17
-set(VERSION ${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_PATCH})
11
+project("platform")
18 12
 
19 13
 include(Common)
20
-
21
-## Git (and its revision)
22
-find_package(Git QUIET) # if we don't find git or FindGit.cmake is not on the system we ignore it.
23
-## The Git module will trigger a reconfiguration for each pull that will bring a new revision on the local repository
24
-set (VCS_REVISION "-1")
25
-if(GIT_FOUND)
26
-    include(GetGitRevisionDescription)
27
-    get_git_head_revision(GIT_REFSPEC GIT_SHA1)
28
-    message(STATUS "GIT branch ${GIT_REFSPEC}")
29
-    message(STATUS "GIT revision ${GIT_SHA1}")
30
-    set (VCS_REVISION ${GIT_SHA1})
31
-endif()
32
-
33
-# This line finds the boost lib and headers. 
34
-set(Boost_NO_BOOST_CMAKE ON) #  Don't do a find_package in config mode before searching for a regular boost install.
35
-find_package(Boost COMPONENTS program_options system thread REQUIRED)
36
-
37
-find_package(LLVM REQUIRED CONFIG)
38
-message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}")
39
-message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}")
40
-llvm_map_components_to_libnames(llvm_libs support core mcjit x86codegen x86asmparser)
41
-
42
-find_package(SystemC)
43
-if(SystemC_FOUND)
44
-    add_definitions(-DWITH_SYSTEMC)
45
-    include_directories(${SystemC_INCLUDE_DIRS})
46
-    link_directories(${SystemC_LIBRARY_DIRS})
47
-else(SystemC_FOUND)
14
+# check that we have averything we need
15
+if(!SystemC_FOUND)
48 16
     message( FATAL_ERROR "SystemC library not found." )
49
-endif(SystemC_FOUND)
17
+endif()
50 18
 
51
-if(CCI_FOUND)
52
-    include_directories(${CCI_INCLUDE_DIRS})
53
-    link_directories(${CCI_LIBRARY_DIRS})
54
-else()
19
+if(!CCI_FOUND)
55 20
     message( FATAL_ERROR "SystemC CCI library not found." )
56 21
 endif()
57 22
 
58
-if(SCV_FOUND)   
59
-    add_definitions(-DWITH_SCV)
60
-    link_directories(${SCV_LIBRARY_DIRS})
61
-endif(SCV_FOUND)
62
-
63 23
 # This sets the include directory for the reference project. This is the -I flag in gcc.
64
-include_directories(
65
-    ${PROJECT_SOURCE_DIR}/incl
66
-    ${LLVM_INCLUDE_DIRS}
67
-)
68 24
 
69 25
 add_dependent_subproject(dbt-core)
70 26
 add_dependent_subproject(sc-components)
@@ -72,14 +28,11 @@ add_dependent_subproject(riscv)
72 28
 add_dependent_subproject(riscv.sc)
73 29
 
74 30
 include_directories(
75
-    ${PROJECT_SOURCE_DIR}/incl
76
-    ${PROJECT_SOURCE_DIR}/../riscv/incl
77 31
     ${PROJECT_SOURCE_DIR}/../external/elfio
78 32
     ${PROJECT_SOURCE_DIR}/../external/libGIS
79 33
     ${Boost_INCLUDE_DIRS}
80 34
 )
81 35
 
82
-
83 36
 # Mac needed variables (adapt for your needs - http://www.cmake.org/Wiki/CMake_RPATH_handling#Mac_OS_X_and_the_RPATH)
84 37
 set(CMAKE_MACOSX_RPATH ON)
85 38
 set(CMAKE_SKIP_BUILD_RPATH FALSE)
@@ -87,6 +40,9 @@ set(CMAKE_BUILD_WITH_INSTALL_RPATH FALSE)
87 40
 set(CMAKE_INSTALL_RPATH "${CMAKE_INSTALL_PREFIX}/lib")
88 41
 set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE)
89 42
 
43
+## the following setting needs to be consistent with the library
44
+#add_definitions(-DSC_DEFAULT_WRITER_POLICY=SC_MANY_WRITERS)
45
+
90 46
 add_subdirectory(src)
91 47
 
92 48
 #

+ 4
- 3
platform/gen_input/fe310.rdl View File

@@ -1,6 +1,7 @@
1 1
 `include "gpio.rdl"
2 2
 `include "uart.rdl"
3 3
 `include "spi.rdl"
4
+`include "pwm.rdl"
4 5
 `include "plic.rdl"
5 6
 `include "aon.rdl"
6 7
 `include "prci.rdl"
@@ -15,10 +16,10 @@ addrmap e300_plat_t {
15 16
     gpio_regs  gpio0 @0x10012000;
16 17
     uart_regs  uart0 @0x10013000;
17 18
     spi_regs   qspi0 @0x10014000;  
18
-    //pwm_regs pwm0  @0x10015000;
19
+    pwm_regs   pwm0  @0x10015000;
19 20
     uart_regs  uart1 @0x10023000;
20 21
     spi_regs   qspi1 @0x10024000;  
21
-    //pwm_regs pwm1  @0x10025000;
22
+    pwm_regs   pwm1  @0x10025000;
22 23
     spi_regs   qspi2 @0x10034000;  
23
-    //pwm_regs pwm2  @0x10035000;
24
+    pwm_regs   pwm2  @0x10035000;
24 25
 } e300_plat;

+ 96
- 0
platform/gen_input/pwm.rdl View File

@@ -0,0 +1,96 @@
1
+regfile pwm_regs {
2
+	reg {
3
+		name="pwmcfg";
4
+		desc="pin value";
5
+		field {
6
+			name = "pwmscale";
7
+		} pwmscale[3:0];
8
+		field {
9
+			name = "pwmsticky";
10
+		} pwmsticky[8:8];
11
+		field {
12
+			name = "pwmzerocmp";
13
+		} pwmsticky[9:9];
14
+		field {
15
+			name = "pwmdeglitch";
16
+		} pwmsticky[10:10];
17
+		field {
18
+			name = "pwmenalways";
19
+		} pwmenalways[12:12];
20
+		field {
21
+			name = "pwmenoneshot";
22
+		} pwmenalways[13:13];
23
+		field {
24
+			name = "pwmcmp0center";
25
+		} pwmcmp0center[16:16];
26
+		field {
27
+			name = "pwmcmp1center";
28
+		} pwmcmp1center[17:17];
29
+		field {
30
+			name = "pwmcmp2center";
31
+		} pwmcmp2center[18:18];
32
+		field {
33
+			name = "pwmcmp3center";
34
+		} pwmcmp3center[19:19];
35
+		field {
36
+			name = "pwmcmp0gang";
37
+		} pwmcmp0gang[24:24];
38
+		field {
39
+			name = "pwmcmp1gang";
40
+		} pwmcmp1gang[25:25];
41
+		field {
42
+			name = "pwmcmp2gang";
43
+		} pwmcmp2gang[26:26];
44
+		field {
45
+			name = "pwmcmp3gang";
46
+		} pwmcmp3gang[27:27];
47
+		field {
48
+			name = "pwmcmp0ip";
49
+		} pwmcmp0ip[28:28];
50
+		field {
51
+			name = "pwmcmp1ip";
52
+		} pwmcmp1ip[29:29];
53
+		field {
54
+			name = "pwmcmp2ip";
55
+		} pwmcmp2ip[30:30];
56
+		field {
57
+			name = "pwmcmp3ip";
58
+		} pwmcmp3ip[31:31];
59
+	} pwmcfg @0x000;
60
+	reg {
61
+		name="pwmcount";
62
+		field {
63
+			name = "pwmcount"; 
64
+		} pwmcount[31:0];
65
+	} pwmcount @0x008;
66
+	reg {
67
+		name="pwms";
68
+		field {
69
+			name = "pwms";
70
+		}pwms[15:0];
71
+	} pwms @0x010;
72
+	reg {
73
+		name="pwmcmp0";
74
+		field {
75
+			name = "pwmcmp0";
76
+		} pwmcmp0[15:0];
77
+	} pwmcmp0 @0x020;
78
+	reg {
79
+		name="pwmcmp1";
80
+		field {
81
+			name = "pwmcmp0";
82
+		} pwmcmp0[15:0];
83
+	} pwmcmp1 @0x024;
84
+	reg {
85
+		name="pwmcmp2";
86
+		field {
87
+			name = "pwmcmp0";
88
+		} pwmcmp0[15:0];
89
+	} pwmcmp2 @0x028;
90
+	reg {
91
+		name="pwmcmp3";
92
+		field {
93
+			name = "pwmcmp0";
94
+		} pwmcmp0[15:0];
95
+	} pwmcmp3 @0x02C;
96
+};

+ 32
- 36
platform/incl/sysc/SiFive/aon.h View File

@@ -1,38 +1,34 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Contributors:
32
-//       eyck@minres.com - initial implementation
33
-//
34
-//
35
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
36 32
 
37 33
 #ifndef _AON_H_
38 34
 #define _AON_H_
@@ -45,7 +41,7 @@ class aon_regs;
45 41
 
46 42
 class aon : public sc_core::sc_module, public scc::tlm_target<> {
47 43
 public:
48
-    SC_HAS_PROCESS(aon);
44
+    SC_HAS_PROCESS(aon);// NOLINT
49 45
     sc_core::sc_in<sc_core::sc_time> clk_i;
50 46
     sc_core::sc_in<bool> erst_n_i;
51 47
     sc_core::sc_out<sc_core::sc_time> lfclkc_o;

+ 33
- 37
platform/incl/sysc/SiFive/clint.h View File

@@ -1,38 +1,34 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Contributors:
32
-//       eyck@minres.com - initial implementation
33
-//
34
-//
35
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
36 32
 
37 33
 #ifndef _CLINT_H_
38 34
 #define _CLINT_H_
@@ -54,14 +50,14 @@ class core_complex;
54 50
 
55 51
 class clint : public sc_core::sc_module, public scc::tlm_target<> {
56 52
 public:
57
-    SC_HAS_PROCESS(clint);
53
+    SC_HAS_PROCESS(clint);// NOLINT
58 54
     sc_core::sc_in<sc_core::sc_time> tlclk_i;
59 55
     sc_core::sc_in<sc_core::sc_time> lfclk_i;
60 56
     sc_core::sc_in<bool> rst_i;
61 57
     sc_core::sc_out<bool> mtime_int_o;
62 58
     sc_core::sc_out<bool> msip_int_o;
63 59
     clint(sc_core::sc_module_name nm);
64
-    virtual ~clint() override; // need to keep it in source file because of fwd declaration of clint_regs
60
+    virtual ~clint() override; // NOLINT // need to keep it in source file because of fwd declaration of clint_regs
65 61
 
66 62
 protected:
67 63
     void clock_cb();

+ 106
- 0
platform/incl/sysc/SiFive/fe310.h View File

@@ -0,0 +1,106 @@
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
32
+
33
+#ifndef _PLATFORM_H_
34
+#define _PLATFORM_H_
35
+
36
+#include "aon.h"
37
+#include "clint.h"
38
+#include "gpio.h"
39
+#include "plic.h"
40
+#include "prci.h"
41
+#include "pwm.h"
42
+#include "spi.h"
43
+#include "sysc/core_complex.h"
44
+#include "uart.h"
45
+
46
+#include "cci_configuration"
47
+#include "scc/memory.h"
48
+#include "scc/router.h"
49
+#include "scc/utilities.h"
50
+#include "tlm/tlm_signal_sockets.h"
51
+#include <array>
52
+#include <memory>
53
+#include <sysc/kernel/sc_module.h>
54
+
55
+namespace sysc {
56
+
57
+class fe310 : public sc_core::sc_module {
58
+public:
59
+    SC_HAS_PROCESS(fe310);// NOLINT
60
+
61
+    sc_core::sc_vector<tlm::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
62
+    sc_core::sc_vector<tlm::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i;
63
+
64
+    sc_core::sc_in<bool> erst_n;
65
+
66
+    fe310(sc_core::sc_module_name nm);
67
+
68
+    cci::cci_param<bool> use_rtl;
69
+
70
+private:
71
+    std::unique_ptr<SiFive::core_complex> i_core_complex;
72
+    std::unique_ptr<scc::router<>> i_router;
73
+    std::unique_ptr<uart> i_uart0, i_uart1;
74
+    std::unique_ptr<spi> i_qspi0, i_qspi1, i_qspi2;
75
+    std::unique_ptr<pwm> i_pwm0, i_pwm1, i_pwm2;
76
+    std::unique_ptr<gpio> i_gpio0;
77
+    std::unique_ptr<plic> i_plic;
78
+    std::unique_ptr<aon> i_aon;
79
+    std::unique_ptr<prci> i_prci;
80
+    std::unique_ptr<clint> i_clint;
81
+
82
+    using mem_qspi_t = scc::memory<512_MB, 32>;
83
+    std::unique_ptr<mem_qspi_t> i_mem_qspi;
84
+    using mem_ram_t = scc::memory<128_kB, 32>;
85
+    std::unique_ptr<mem_ram_t> i_mem_ram;
86
+
87
+    sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> s_tlclk;
88
+    sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> s_lfclk;
89
+    
90
+    sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_rst, s_mtime_int, s_msie_int;
91
+    
92
+    sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> s_global_int, s_local_int;
93
+    sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_core_int;
94
+    
95
+    sc_core::sc_vector<scc::tlm_signal_bool_opt_in> s_dummy_sck_i;
96
+    sc_core::sc_vector<scc::tlm_signal_bool_opt_out> s_dummy_sck_o;
97
+
98
+protected:
99
+    void gen_reset();
100
+
101
+#include "gen/e300_plat_t.h"
102
+};
103
+
104
+} /* namespace sysc */
105
+
106
+#endif /* _PLATFORM_H_ */

+ 67
- 77
platform/incl/sysc/SiFive/gen/aon_regs.h View File

@@ -1,104 +1,98 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      aon_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _AON_REGS_H_
37 34
 #define _AON_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class aon_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class aon_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     uint32_t r_wdogcfg;
53
-    
47
+
54 48
     uint32_t r_wdogcount;
55
-    
49
+
56 50
     uint32_t r_wdogs;
57
-    
51
+
58 52
     uint32_t r_wdogfeed;
59
-    
53
+
60 54
     uint32_t r_wdogkey;
61
-    
55
+
62 56
     uint32_t r_wdogcmp;
63
-    
57
+
64 58
     uint32_t r_rtccfg;
65
-    
59
+
66 60
     uint32_t r_rtclo;
67
-    
61
+
68 62
     uint32_t r_rtchi;
69
-    
63
+
70 64
     uint32_t r_rtcs;
71
-    
65
+
72 66
     uint32_t r_rtccmp;
73
-    
67
+
74 68
     uint32_t r_lfrosccfg;
75
-    
69
+
76 70
     std::array<uint32_t, 32> r_backup;
77
-    
71
+
78 72
     BEGIN_BF_DECL(pmuwakeupi_t, uint32_t);
79
-        BF_FIELD(delay, 0, 4);
80
-        BF_FIELD(vddpaden, 5, 1);
81
-        BF_FIELD(corerst, 7, 1);
82
-        BF_FIELD(hfclkrst, 8, 1);
83
-    END_BF_DECL() ;
73
+    BF_FIELD(delay, 0, 4);
74
+    BF_FIELD(vddpaden, 5, 1);
75
+    BF_FIELD(corerst, 7, 1);
76
+    BF_FIELD(hfclkrst, 8, 1);
77
+    END_BF_DECL();
84 78
     std::array<pmuwakeupi_t, 8> r_pmuwakeupi;
85
-    
79
+
86 80
     BEGIN_BF_DECL(pmusleepi_t, uint32_t);
87
-        BF_FIELD(delay, 0, 4);
88
-        BF_FIELD(vddpaden, 5, 1);
89
-        BF_FIELD(corerst, 7, 1);
90
-        BF_FIELD(hfclkrst, 8, 1);
91
-    END_BF_DECL() ;
81
+    BF_FIELD(delay, 0, 4);
82
+    BF_FIELD(vddpaden, 5, 1);
83
+    BF_FIELD(corerst, 7, 1);
84
+    BF_FIELD(hfclkrst, 8, 1);
85
+    END_BF_DECL();
92 86
     std::array<pmusleepi_t, 8> r_pmusleepi;
93
-    
87
+
94 88
     uint32_t r_pmuie;
95
-    
89
+
96 90
     uint32_t r_pmucause;
97
-    
91
+
98 92
     uint32_t r_pmusleep;
99
-    
93
+
100 94
     uint32_t r_pmukey;
101
-    
95
+
102 96
     // register declarations
103 97
     scc::sc_register<uint32_t> wdogcfg;
104 98
     scc::sc_register<uint32_t> wdogcount;
@@ -119,11 +113,10 @@ public:
119 113
     scc::sc_register<uint32_t> pmucause;
120 114
     scc::sc_register<uint32_t> pmusleep;
121 115
     scc::sc_register<uint32_t> pmukey;
122
-    
116
+
123 117
     aon_regs(sc_core::sc_module_name nm);
124 118
 
125
-    template<unsigned BUSWIDTH=32>
126
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
119
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
127 120
 };
128 121
 }
129 122
 //////////////////////////////////////////////////////////////////////////////
@@ -150,12 +143,9 @@ inline sysc::aon_regs::aon_regs(sc_core::sc_module_name nm)
150 143
 , NAMED(pmuie, r_pmuie, 0, *this)
151 144
 , NAMED(pmucause, r_pmucause, 0, *this)
152 145
 , NAMED(pmusleep, r_pmusleep, 0, *this)
153
-, NAMED(pmukey, r_pmukey, 0, *this)
154
-{
155
-}
146
+, NAMED(pmukey, r_pmukey, 0, *this) {}
156 147
 
157
-template<unsigned BUSWIDTH>
158
-inline void sysc::aon_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
148
+template <unsigned BUSWIDTH> inline void sysc::aon_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
159 149
     target.addResource(wdogcfg, 0x0UL);
160 150
     target.addResource(wdogcount, 0x8UL);
161 151
     target.addResource(wdogs, 0x10UL);

+ 42
- 52
platform/incl/sysc/SiFive/gen/clint_regs.h View File

@@ -1,71 +1,64 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      clint_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _CLINT_REGS_H_
37 34
 #define _CLINT_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class clint_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class clint_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     BEGIN_BF_DECL(msip_t, uint32_t);
53
-        BF_FIELD(msip, 0, 1);
47
+    BF_FIELD(msip, 0, 1);
54 48
     END_BF_DECL() r_msip;
55
-    
49
+
56 50
     uint64_t r_mtimecmp;
57
-    
51
+
58 52
     uint64_t r_mtime;
59
-    
53
+
60 54
     // register declarations
61 55
     scc::sc_register<msip_t> msip;
62 56
     scc::sc_register<uint64_t> mtimecmp;
63 57
     scc::sc_register<uint64_t> mtime;
64
-    
58
+
65 59
     clint_regs(sc_core::sc_module_name nm);
66 60
 
67
-    template<unsigned BUSWIDTH=32>
68
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
61
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
69 62
 };
70 63
 }
71 64
 //////////////////////////////////////////////////////////////////////////////
@@ -76,12 +69,9 @@ inline sysc::clint_regs::clint_regs(sc_core::sc_module_name nm)
76 69
 : sc_core::sc_module(nm)
77 70
 , NAMED(msip, r_msip, 0, *this)
78 71
 , NAMED(mtimecmp, r_mtimecmp, 0, *this)
79
-, NAMED(mtime, r_mtime, 0, *this)
80
-{
81
-}
72
+, NAMED(mtime, r_mtime, 0, *this) {}
82 73
 
83
-template<unsigned BUSWIDTH>
84
-inline void sysc::clint_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
74
+template <unsigned BUSWIDTH> inline void sysc::clint_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
85 75
     target.addResource(msip, 0x0UL);
86 76
     target.addResource(mtimecmp, 0x4000UL);
87 77
     target.addResource(mtime, 0xbff8UL);

+ 19
- 15
platform/incl/sysc/SiFive/gen/e300_plat_t.h View File

@@ -1,17 +1,21 @@
1
-#ifndef _E300_PLAT_MAP_H_
2
-#define _E300_PLAT_MAP_H_
3
-// need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
4
-const std::array<scc::target_memory_map_entry<32>, 10> e300_plat_map = {{
5
-    {&i_clint, 0x2000000, 0xc000},
6
-    {&i_plic, 0xc000000, 0x200008},
7
-    {&i_aon, 0x10000000, 0x150},
8
-    {&i_prci, 0x10008000, 0x14},
9
-    {&i_gpio0, 0x10012000, 0x44},
10
-    {&i_uart0, 0x10013000, 0x1c},
11
-    {&i_qspi0, 0x10014000, 0x78},
12
-    {&i_uart1, 0x10023000, 0x1c},
13
-    {&i_qspi1, 0x10024000, 0x78},
14
-    {&i_qspi2, 0x10034000, 0x78},
1
+#ifndef _E300_PLAT_T_MAP_H_
2
+#define _E300_PLAT_T_MAP_H_
3
+// need double braces, see
4
+// https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
5
+const std::array<scc::target_memory_map_entry<32>, 13> e300_plat_t_map = {{
6
+    {i_clint->socket, 0x2000000, 0xc000},
7
+    {i_plic->socket, 0xc000000, 0x200008},
8
+    {i_aon->socket, 0x10000000, 0x150},
9
+    {i_prci->socket, 0x10008000, 0x14},
10
+    {i_gpio0->socket, 0x10012000, 0x44},
11
+    {i_uart0->socket, 0x10013000, 0x1c},
12
+    {i_qspi0->socket, 0x10014000, 0x78},
13
+    {i_pwm0->socket, 0x10015000, 0x30},
14
+    {i_uart1->socket, 0x10023000, 0x1c},
15
+    {i_qspi1->socket, 0x10024000, 0x78},
16
+    {i_pwm1->socket, 0x10025000, 0x30},
17
+    {i_qspi2->socket, 0x10034000, 0x78},
18
+    {i_pwm2->socket, 0x10035000, 0x30},
15 19
 }};
16 20
 
17
-#endif /* _E300_PLAT_MAP_H_ */
21
+#endif /* _E300_PLAT_T_MAP_H_ */

+ 76
- 65
platform/incl/sysc/SiFive/gen/gpio_regs.h View File

@@ -1,88 +1,82 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      gpio_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _GPIO_REGS_H_
37 34
 #define _GPIO_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class gpio_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class gpio_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     uint32_t r_value;
53
-    
47
+
54 48
     uint32_t r_input_en;
55
-    
49
+
56 50
     uint32_t r_output_en;
57
-    
51
+
58 52
     uint32_t r_port;
59
-    
53
+
60 54
     uint32_t r_pue;
61
-    
55
+
62 56
     uint32_t r_ds;
63
-    
57
+
64 58
     uint32_t r_rise_ie;
65
-    
59
+
66 60
     uint32_t r_rise_ip;
67
-    
61
+
68 62
     uint32_t r_fall_ie;
69
-    
63
+
70 64
     uint32_t r_fall_ip;
71
-    
65
+
72 66
     uint32_t r_high_ie;
73
-    
67
+
74 68
     uint32_t r_high_ip;
75
-    
69
+
76 70
     uint32_t r_low_ie;
77
-    
71
+
78 72
     uint32_t r_low_ip;
79
-    
73
+
80 74
     uint32_t r_iof_en;
81
-    
75
+
82 76
     uint32_t r_iof_sel;
83
-    
77
+
84 78
     uint32_t r_out_xor;
85
-    
79
+
86 80
     // register declarations
87 81
     scc::sc_register<uint32_t> value;
88 82
     scc::sc_register<uint32_t> input_en;
@@ -101,11 +95,11 @@ public:
101 95
     scc::sc_register<uint32_t> iof_en;
102 96
     scc::sc_register<uint32_t> iof_sel;
103 97
     scc::sc_register<uint32_t> out_xor;
104
-    
98
+
105 99
     gpio_regs(sc_core::sc_module_name nm);
106 100
 
107
-    template<unsigned BUSWIDTH=32>
108
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
101
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
102
+    void trace(sc_core::sc_trace_file *tf) const override;
109 103
 };
110 104
 }
111 105
 //////////////////////////////////////////////////////////////////////////////
@@ -130,12 +124,9 @@ inline sysc::gpio_regs::gpio_regs(sc_core::sc_module_name nm)
130 124
 , NAMED(low_ip, r_low_ip, 0, *this)
131 125
 , NAMED(iof_en, r_iof_en, 0, *this)
132 126
 , NAMED(iof_sel, r_iof_sel, 0, *this)
133
-, NAMED(out_xor, r_out_xor, 0, *this)
134
-{
135
-}
127
+, NAMED(out_xor, r_out_xor, 0, *this) {}
136 128
 
137
-template<unsigned BUSWIDTH>
138
-inline void sysc::gpio_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
129
+template <unsigned BUSWIDTH> inline void sysc::gpio_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
139 130
     target.addResource(value, 0x0UL);
140 131
     target.addResource(input_en, 0x4UL);
141 132
     target.addResource(output_en, 0x8UL);
@@ -155,4 +146,24 @@ inline void sysc::gpio_regs::registerResources(scc::tlm_target<BUSWIDTH>& target
155 146
     target.addResource(out_xor, 0x40UL);
156 147
 }
157 148
 
149
+inline void sysc::gpio_regs::trace(sc_core::sc_trace_file *tf) const {
150
+    value.trace(tf);
151
+    input_en.trace(tf);
152
+    output_en.trace(tf);
153
+    port.trace(tf);
154
+    pue.trace(tf);
155
+    ds.trace(tf);
156
+    rise_ie.trace(tf);
157
+    rise_ip.trace(tf);
158
+    fall_ie.trace(tf);
159
+    fall_ip.trace(tf);
160
+    high_ie.trace(tf);
161
+    high_ip.trace(tf);
162
+    low_ie.trace(tf);
163
+    low_ip.trace(tf);
164
+    iof_en.trace(tf);
165
+    iof_sel.trace(tf);
166
+    out_xor.trace(tf);
167
+}
168
+
158 169
 #endif // _GPIO_REGS_H_

+ 46
- 56
platform/incl/sysc/SiFive/gen/plic_regs.h View File

@@ -1,80 +1,73 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      plic_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _PLIC_REGS_H_
37 34
 #define _PLIC_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class plic_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class plic_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     BEGIN_BF_DECL(priority_t, uint32_t);
53
-        BF_FIELD(priority, 0, 3);
54
-    END_BF_DECL() ;
47
+    BF_FIELD(priority, 0, 3);
48
+    END_BF_DECL();
55 49
     std::array<priority_t, 256> r_priority;
56
-    
50
+
57 51
     std::array<uint32_t, 8> r_pending;
58
-    
52
+
59 53
     std::array<uint32_t, 8> r_enabled;
60
-    
54
+
61 55
     BEGIN_BF_DECL(threshold_t, uint32_t);
62
-        BF_FIELD(threshold, 0, 3);
56
+    BF_FIELD(threshold, 0, 3);
63 57
     END_BF_DECL() r_threshold;
64
-    
58
+
65 59
     uint32_t r_claim_complete;
66
-    
60
+
67 61
     // register declarations
68 62
     scc::sc_register_indexed<priority_t, 256> priority;
69 63
     scc::sc_register_indexed<uint32_t, 8> pending;
70 64
     scc::sc_register_indexed<uint32_t, 8> enabled;
71 65
     scc::sc_register<threshold_t> threshold;
72 66
     scc::sc_register<uint32_t> claim_complete;
73
-    
67
+
74 68
     plic_regs(sc_core::sc_module_name nm);
75 69
 
76
-    template<unsigned BUSWIDTH=32>
77
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
70
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
78 71
 };
79 72
 }
80 73
 //////////////////////////////////////////////////////////////////////////////
@@ -87,12 +80,9 @@ inline sysc::plic_regs::plic_regs(sc_core::sc_module_name nm)
87 80
 , NAMED(pending, r_pending, 0, *this)
88 81
 , NAMED(enabled, r_enabled, 0, *this)
89 82
 , NAMED(threshold, r_threshold, 0, *this)
90
-, NAMED(claim_complete, r_claim_complete, 0, *this)
91
-{
92
-}
83
+, NAMED(claim_complete, r_claim_complete, 0, *this) {}
93 84
 
94
-template<unsigned BUSWIDTH>
95
-inline void sysc::plic_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
85
+template <unsigned BUSWIDTH> inline void sysc::plic_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
96 86
     target.addResource(priority, 0x0UL);
97 87
     target.addResource(pending, 0x1000UL);
98 88
     target.addResource(enabled, 0x2000UL);

+ 56
- 66
platform/incl/sysc/SiFive/gen/prci_regs.h View File

@@ -1,91 +1,84 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      prci_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _PRCI_REGS_H_
37 34
 #define _PRCI_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class prci_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class prci_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     BEGIN_BF_DECL(hfrosccfg_t, uint32_t);
53
-        BF_FIELD(hfroscdiv, 0, 6);
54
-        BF_FIELD(hfrosctrim, 16, 5);
55
-        BF_FIELD(hfroscen, 30, 1);
56
-        BF_FIELD(hfroscrdy, 31, 1);
47
+    BF_FIELD(hfroscdiv, 0, 6);
48
+    BF_FIELD(hfrosctrim, 16, 5);
49
+    BF_FIELD(hfroscen, 30, 1);
50
+    BF_FIELD(hfroscrdy, 31, 1);
57 51
     END_BF_DECL() r_hfrosccfg;
58
-    
52
+
59 53
     BEGIN_BF_DECL(hfxosccfg_t, uint32_t);
60
-        BF_FIELD(hfxoscrdy, 31, 1);
61
-        BF_FIELD(hfxoscen, 30, 1);
54
+    BF_FIELD(hfxoscrdy, 31, 1);
55
+    BF_FIELD(hfxoscen, 30, 1);
62 56
     END_BF_DECL() r_hfxosccfg;
63
-    
57
+
64 58
     BEGIN_BF_DECL(pllcfg_t, uint32_t);
65
-        BF_FIELD(pllr, 0, 3);
66
-        BF_FIELD(pllf, 4, 6);
67
-        BF_FIELD(pllq, 10, 2);
68
-        BF_FIELD(pllsel, 16, 1);
69
-        BF_FIELD(pllrefsel, 17, 1);
70
-        BF_FIELD(pllbypass, 18, 1);
71
-        BF_FIELD(plllock, 31, 1);
59
+    BF_FIELD(pllr, 0, 3);
60
+    BF_FIELD(pllf, 4, 6);
61
+    BF_FIELD(pllq, 10, 2);
62
+    BF_FIELD(pllsel, 16, 1);
63
+    BF_FIELD(pllrefsel, 17, 1);
64
+    BF_FIELD(pllbypass, 18, 1);
65
+    BF_FIELD(plllock, 31, 1);
72 66
     END_BF_DECL() r_pllcfg;
73
-    
67
+
74 68
     uint32_t r_plloutdiv;
75
-    
69
+
76 70
     uint32_t r_coreclkcfg;
77
-    
71
+
78 72
     // register declarations
79 73
     scc::sc_register<hfrosccfg_t> hfrosccfg;
80 74
     scc::sc_register<hfxosccfg_t> hfxosccfg;
81 75
     scc::sc_register<pllcfg_t> pllcfg;
82 76
     scc::sc_register<uint32_t> plloutdiv;
83 77
     scc::sc_register<uint32_t> coreclkcfg;
84
-    
78
+
85 79
     prci_regs(sc_core::sc_module_name nm);
86 80
 
87
-    template<unsigned BUSWIDTH=32>
88
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
81
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
89 82
 };
90 83
 }
91 84
 //////////////////////////////////////////////////////////////////////////////
@@ -98,12 +91,9 @@ inline sysc::prci_regs::prci_regs(sc_core::sc_module_name nm)
98 91
 , NAMED(hfxosccfg, r_hfxosccfg, 0x40000000, *this)
99 92
 , NAMED(pllcfg, r_pllcfg, 0, *this)
100 93
 , NAMED(plloutdiv, r_plloutdiv, 0, *this)
101
-, NAMED(coreclkcfg, r_coreclkcfg, 0, *this)
102
-{
103
-}
94
+, NAMED(coreclkcfg, r_coreclkcfg, 0, *this) {}
104 95
 
105
-template<unsigned BUSWIDTH>
106
-inline void sysc::prci_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
96
+template <unsigned BUSWIDTH> inline void sysc::prci_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
107 97
     target.addResource(hfrosccfg, 0x0UL);
108 98
     target.addResource(hfxosccfg, 0x4UL);
109 99
     target.addResource(pllcfg, 0x8UL);

+ 129
- 0
platform/incl/sysc/SiFive/gen/pwm_regs.h View File

@@ -0,0 +1,129 @@
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
32
+
33
+#ifndef _PWM_REGS_H_
34
+#define _PWM_REGS_H_
35
+
36
+#include <scc/register.h>
37
+#include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
40
+
41
+namespace sysc {
42
+
43
+class pwm_regs : public sc_core::sc_module, public scc::resetable {
44
+public:
45
+    // storage declarations
46
+    BEGIN_BF_DECL(pwmcfg_t, uint32_t);
47
+    BF_FIELD(pwmscale, 0, 4);
48
+    BF_FIELD(pwmsticky, 8, 1);
49
+    BF_FIELD(pwmzerocmp, 9, 1);
50
+    BF_FIELD(pwmdeglitch, 10, 1);
51
+    BF_FIELD(pwmenalways, 12, 1);
52
+    BF_FIELD(pwmenoneshot, 13, 1);
53
+    BF_FIELD(pwmcmp0center, 16, 1);
54
+    BF_FIELD(pwmcmp1center, 17, 1);
55
+    BF_FIELD(pwmcmp2center, 18, 1);
56
+    BF_FIELD(pwmcmp3center, 19, 1);
57
+    BF_FIELD(pwmcmp0gang, 24, 1);
58
+    BF_FIELD(pwmcmp1gang, 25, 1);
59
+    BF_FIELD(pwmcmp2gang, 26, 1);
60
+    BF_FIELD(pwmcmp3gang, 27, 1);
61
+    BF_FIELD(pwmcmp0ip, 28, 1);
62
+    BF_FIELD(pwmcmp1ip, 29, 1);
63
+    BF_FIELD(pwmcmp2ip, 30, 1);
64
+    BF_FIELD(pwmcmp3ip, 31, 1);
65
+    END_BF_DECL() r_pwmcfg;
66
+
67
+    BEGIN_BF_DECL(pwmcount_t, uint32_t);
68
+    BF_FIELD(pwmcount, 0, 31);
69
+    END_BF_DECL() r_pwmcount;
70
+
71
+    BEGIN_BF_DECL(pwms_t, uint32_t);
72
+    BF_FIELD(pwms, 0, 16);
73
+    END_BF_DECL() r_pwms;
74
+
75
+    BEGIN_BF_DECL(pwmcmp0_t, uint32_t);
76
+    BF_FIELD(pwmcmp0, 0, 16);
77
+    END_BF_DECL() r_pwmcmp0;
78
+
79
+    BEGIN_BF_DECL(pwmcmp1_t, uint32_t);
80
+    BF_FIELD(pwmcmp0, 0, 16);
81
+    END_BF_DECL() r_pwmcmp1;
82
+
83
+    BEGIN_BF_DECL(pwmcmp2_t, uint32_t);
84
+    BF_FIELD(pwmcmp0, 0, 16);
85
+    END_BF_DECL() r_pwmcmp2;
86
+
87
+    BEGIN_BF_DECL(pwmcmp3_t, uint32_t);
88
+    BF_FIELD(pwmcmp0, 0, 16);
89
+    END_BF_DECL() r_pwmcmp3;
90
+
91
+    // register declarations
92
+    scc::sc_register<pwmcfg_t> pwmcfg;
93
+    scc::sc_register<pwmcount_t> pwmcount;
94
+    scc::sc_register<pwms_t> pwms;
95
+    scc::sc_register<pwmcmp0_t> pwmcmp0;
96
+    scc::sc_register<pwmcmp1_t> pwmcmp1;
97
+    scc::sc_register<pwmcmp2_t> pwmcmp2;
98
+    scc::sc_register<pwmcmp3_t> pwmcmp3;
99
+
100
+    pwm_regs(sc_core::sc_module_name nm);
101
+
102
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
103
+};
104
+}
105
+//////////////////////////////////////////////////////////////////////////////
106
+// member functions
107
+//////////////////////////////////////////////////////////////////////////////
108
+
109
+inline sysc::pwm_regs::pwm_regs(sc_core::sc_module_name nm)
110
+: sc_core::sc_module(nm)
111
+, NAMED(pwmcfg, r_pwmcfg, 0, *this)
112
+, NAMED(pwmcount, r_pwmcount, 0, *this)
113
+, NAMED(pwms, r_pwms, 0, *this)
114
+, NAMED(pwmcmp0, r_pwmcmp0, 0, *this)
115
+, NAMED(pwmcmp1, r_pwmcmp1, 0, *this)
116
+, NAMED(pwmcmp2, r_pwmcmp2, 0, *this)
117
+, NAMED(pwmcmp3, r_pwmcmp3, 0, *this) {}
118
+
119
+template <unsigned BUSWIDTH> inline void sysc::pwm_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
120
+    target.addResource(pwmcfg, 0x0UL);
121
+    target.addResource(pwmcount, 0x8UL);
122
+    target.addResource(pwms, 0x10UL);
123
+    target.addResource(pwmcmp0, 0x20UL);
124
+    target.addResource(pwmcmp1, 0x24UL);
125
+    target.addResource(pwmcmp2, 0x28UL);
126
+    target.addResource(pwmcmp3, 0x2cUL);
127
+}
128
+
129
+#endif // _PWM_REGS_H_

+ 85
- 95
platform/incl/sysc/SiFive/gen/spi_regs.h View File

@@ -1,131 +1,125 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      spi_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _SPI_REGS_H_
37 34
 #define _SPI_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class spi_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class spi_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     BEGIN_BF_DECL(sckdiv_t, uint32_t);
53
-        BF_FIELD(div, 0, 12);
47
+    BF_FIELD(div, 0, 12);
54 48
     END_BF_DECL() r_sckdiv;
55
-    
49
+
56 50
     BEGIN_BF_DECL(sckmode_t, uint32_t);
57
-        BF_FIELD(pha, 0, 1);
58
-        BF_FIELD(pol, 1, 1);
51
+    BF_FIELD(pha, 0, 1);
52
+    BF_FIELD(pol, 1, 1);
59 53
     END_BF_DECL() r_sckmode;
60
-    
54
+
61 55
     uint32_t r_csid;
62
-    
56
+
63 57
     uint32_t r_csdef;
64
-    
58
+
65 59
     BEGIN_BF_DECL(csmode_t, uint32_t);
66
-        BF_FIELD(mode, 0, 2);
60
+    BF_FIELD(mode, 0, 2);
67 61
     END_BF_DECL() r_csmode;
68
-    
62
+
69 63
     BEGIN_BF_DECL(delay0_t, uint32_t);
70
-        BF_FIELD(cssck, 0, 8);
71
-        BF_FIELD(sckcs, 16, 8);
64
+    BF_FIELD(cssck, 0, 8);
65
+    BF_FIELD(sckcs, 16, 8);
72 66
     END_BF_DECL() r_delay0;
73
-    
67
+
74 68
     BEGIN_BF_DECL(delay1_t, uint32_t);
75
-        BF_FIELD(intercs, 0, 16);
76
-        BF_FIELD(interxfr, 16, 8);
69
+    BF_FIELD(intercs, 0, 16);
70
+    BF_FIELD(interxfr, 16, 8);
77 71
     END_BF_DECL() r_delay1;
78
-    
72
+
79 73
     BEGIN_BF_DECL(fmt_t, uint32_t);
80
-        BF_FIELD(proto, 0, 2);
81
-        BF_FIELD(endian, 2, 1);
82
-        BF_FIELD(dir, 3, 1);
83
-        BF_FIELD(len, 16, 4);
74
+    BF_FIELD(proto, 0, 2);
75
+    BF_FIELD(endian, 2, 1);
76
+    BF_FIELD(dir, 3, 1);
77
+    BF_FIELD(len, 16, 4);
84 78
     END_BF_DECL() r_fmt;
85
-    
79
+
86 80
     BEGIN_BF_DECL(txdata_t, uint32_t);
87
-        BF_FIELD(data, 0, 8);
88
-        BF_FIELD(full, 31, 1);
81
+    BF_FIELD(data, 0, 8);
82
+    BF_FIELD(full, 31, 1);
89 83
     END_BF_DECL() r_txdata;
90
-    
84
+
91 85
     BEGIN_BF_DECL(rxdata_t, uint32_t);
92
-        BF_FIELD(data, 0, 8);
93
-        BF_FIELD(empty, 31, 1);
86
+    BF_FIELD(data, 0, 8);
87
+    BF_FIELD(empty, 31, 1);
94 88
     END_BF_DECL() r_rxdata;
95
-    
89
+
96 90
     BEGIN_BF_DECL(txmark_t, uint32_t);
97
-        BF_FIELD(txmark, 0, 3);
91
+    BF_FIELD(txmark, 0, 3);
98 92
     END_BF_DECL() r_txmark;
99
-    
93
+
100 94
     BEGIN_BF_DECL(rxmark_t, uint32_t);
101
-        BF_FIELD(rxmark, 0, 3);
95
+    BF_FIELD(rxmark, 0, 3);
102 96
     END_BF_DECL() r_rxmark;
103
-    
97
+
104 98
     BEGIN_BF_DECL(fctrl_t, uint32_t);
105
-        BF_FIELD(en, 0, 1);
99
+    BF_FIELD(en, 0, 1);
106 100
     END_BF_DECL() r_fctrl;
107
-    
101
+
108 102
     BEGIN_BF_DECL(ffmt_t, uint32_t);
109
-        BF_FIELD(cmd_en, 0, 1);
110
-        BF_FIELD(addr_len, 1, 2);
111
-        BF_FIELD(pad_cnt, 3, 4);
112
-        BF_FIELD(cmd_proto, 7, 2);
113
-        BF_FIELD(addr_proto, 9, 2);
114
-        BF_FIELD(data_proto, 11, 2);
115
-        BF_FIELD(cmd_code, 16, 8);
116
-        BF_FIELD(pad_code, 24, 8);
103
+    BF_FIELD(cmd_en, 0, 1);
104
+    BF_FIELD(addr_len, 1, 2);
105
+    BF_FIELD(pad_cnt, 3, 4);
106
+    BF_FIELD(cmd_proto, 7, 2);
107
+    BF_FIELD(addr_proto, 9, 2);
108
+    BF_FIELD(data_proto, 11, 2);
109
+    BF_FIELD(cmd_code, 16, 8);
110
+    BF_FIELD(pad_code, 24, 8);
117 111
     END_BF_DECL() r_ffmt;
118
-    
112
+
119 113
     BEGIN_BF_DECL(ie_t, uint32_t);
120
-        BF_FIELD(txwm, 0, 1);
121
-        BF_FIELD(rxwm, 1, 1);
114
+    BF_FIELD(txwm, 0, 1);
115
+    BF_FIELD(rxwm, 1, 1);
122 116
     END_BF_DECL() r_ie;
123
-    
117
+
124 118
     BEGIN_BF_DECL(ip_t, uint32_t);
125
-        BF_FIELD(txwm, 0, 1);
126
-        BF_FIELD(rxwm, 1, 1);
119
+    BF_FIELD(txwm, 0, 1);
120
+    BF_FIELD(rxwm, 1, 1);
127 121
     END_BF_DECL() r_ip;
128
-    
122
+
129 123
     // register declarations
130 124
     scc::sc_register<sckdiv_t> sckdiv;
131 125
     scc::sc_register<sckmode_t> sckmode;
@@ -143,11 +137,10 @@ public:
143 137
     scc::sc_register<ffmt_t> ffmt;
144 138
     scc::sc_register<ie_t> ie;
145 139
     scc::sc_register<ip_t> ip;
146
-    
140
+
147 141
     spi_regs(sc_core::sc_module_name nm);
148 142
 
149
-    template<unsigned BUSWIDTH=32>
150
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
143
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
151 144
 };
152 145
 }
153 146
 //////////////////////////////////////////////////////////////////////////////
@@ -171,12 +164,9 @@ inline sysc::spi_regs::spi_regs(sc_core::sc_module_name nm)
171 164
 , NAMED(fctrl, r_fctrl, 0, *this)
172 165
 , NAMED(ffmt, r_ffmt, 0, *this)
173 166
 , NAMED(ie, r_ie, 0, *this)
174
-, NAMED(ip, r_ip, 0, *this)
175
-{
176
-}
167
+, NAMED(ip, r_ip, 0, *this) {}
177 168
 
178
-template<unsigned BUSWIDTH>
179
-inline void sysc::spi_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
169
+template <unsigned BUSWIDTH> inline void sysc::spi_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
180 170
     target.addResource(sckdiv, 0x0UL);
181 171
     target.addResource(sckmode, 0x4UL);
182 172
     target.addResource(csid, 0x10UL);

+ 59
- 69
platform/incl/sysc/SiFive/gen/uart_regs.h View File

@@ -1,89 +1,83 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Created on: Fri Nov 10 18:01:53 CET 2017
32
-//             *      uart_regs.h Author: <RDL Generator>
33
-//
34
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
35 32
 
36 33
 #ifndef _UART_REGS_H_
37 34
 #define _UART_REGS_H_
38 35
 
39
-#include <scc/utilities.h>
40
-#include <util/bit_field.h>
41 36
 #include <scc/register.h>
42 37
 #include <scc/tlm_target.h>
38
+#include <scc/utilities.h>
39
+#include <util/bit_field.h>
43 40
 
44 41
 namespace sysc {
45 42
 
46
-class uart_regs :
47
-        public sc_core::sc_module,
48
-        public scc::resetable
49
-{
43
+class uart_regs : public sc_core::sc_module, public scc::resetable {
50 44
 public:
51 45
     // storage declarations
52 46
     BEGIN_BF_DECL(txdata_t, uint32_t);
53
-        BF_FIELD(data, 0, 8);
54
-        BF_FIELD(full, 31, 1);
47
+    BF_FIELD(data, 0, 8);
48
+    BF_FIELD(full, 31, 1);
55 49
     END_BF_DECL() r_txdata;
56
-    
50
+
57 51
     BEGIN_BF_DECL(rxdata_t, uint32_t);
58
-        BF_FIELD(data, 0, 8);
59
-        BF_FIELD(empty, 31, 1);
52
+    BF_FIELD(data, 0, 8);
53
+    BF_FIELD(empty, 31, 1);
60 54
     END_BF_DECL() r_rxdata;
61
-    
55
+
62 56
     BEGIN_BF_DECL(txctrl_t, uint32_t);
63
-        BF_FIELD(txen, 0, 1);
64
-        BF_FIELD(nstop, 1, 1);
65
-        BF_FIELD(txcnt, 16, 3);
57
+    BF_FIELD(txen, 0, 1);
58
+    BF_FIELD(nstop, 1, 1);
59
+    BF_FIELD(txcnt, 16, 3);
66 60
     END_BF_DECL() r_txctrl;
67
-    
61
+
68 62
     BEGIN_BF_DECL(rxctrl_t, uint32_t);
69
-        BF_FIELD(rxen, 0, 1);
70
-        BF_FIELD(rxcnt, 16, 3);
63
+    BF_FIELD(rxen, 0, 1);
64
+    BF_FIELD(rxcnt, 16, 3);
71 65
     END_BF_DECL() r_rxctrl;
72
-    
66
+
73 67
     BEGIN_BF_DECL(ie_t, uint32_t);
74
-        BF_FIELD(txwm, 0, 1);
75
-        BF_FIELD(rxwm, 1, 1);
68
+    BF_FIELD(txwm, 0, 1);
69
+    BF_FIELD(rxwm, 1, 1);
76 70
     END_BF_DECL() r_ie;
77
-    
71
+
78 72
     BEGIN_BF_DECL(ip_t, uint32_t);
79
-        BF_FIELD(txwm, 0, 1);
80
-        BF_FIELD(rxwm, 1, 1);
73
+    BF_FIELD(txwm, 0, 1);
74
+    BF_FIELD(rxwm, 1, 1);
81 75
     END_BF_DECL() r_ip;
82
-    
76
+
83 77
     BEGIN_BF_DECL(div_t, uint32_t);
84
-        BF_FIELD(div, 0, 16);
78
+    BF_FIELD(div, 0, 16);
85 79
     END_BF_DECL() r_div;
86
-    
80
+
87 81
     // register declarations
88 82
     scc::sc_register<txdata_t> txdata;
89 83
     scc::sc_register<rxdata_t> rxdata;
@@ -92,11 +86,10 @@ public:
92 86
     scc::sc_register<ie_t> ie;
93 87
     scc::sc_register<ip_t> ip;
94 88
     scc::sc_register<div_t> div;
95
-    
89
+
96 90
     uart_regs(sc_core::sc_module_name nm);
97 91
 
98
-    template<unsigned BUSWIDTH=32>
99
-    void registerResources(scc::tlm_target<BUSWIDTH>& target);
92
+    template <unsigned BUSWIDTH = 32> void registerResources(scc::tlm_target<BUSWIDTH> &target);
100 93
 };
101 94
 }
102 95
 //////////////////////////////////////////////////////////////////////////////
@@ -111,12 +104,9 @@ inline sysc::uart_regs::uart_regs(sc_core::sc_module_name nm)
111 104
 , NAMED(rxctrl, r_rxctrl, 0, *this)
112 105
 , NAMED(ie, r_ie, 0, *this)
113 106
 , NAMED(ip, r_ip, 0, *this)
114
-, NAMED(div, r_div, 0, *this)
115
-{
116
-}
107
+, NAMED(div, r_div, 0, *this) {}
117 108
 
118
-template<unsigned BUSWIDTH>
119
-inline void sysc::uart_regs::registerResources(scc::tlm_target<BUSWIDTH>& target) {
109
+template <unsigned BUSWIDTH> inline void sysc::uart_regs::registerResources(scc::tlm_target<BUSWIDTH> &target) {
120 110
     target.addResource(txdata, 0x0UL);
121 111
     target.addResource(rxdata, 0x4UL);
122 112
     target.addResource(txctrl, 0x8UL);

+ 44
- 48
platform/incl/sysc/SiFive/gpio.h View File

@@ -1,47 +1,44 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Contributors:
32
-//       eyck@minres.com - initial implementation
33
-//
34
-//
35
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
36 32
 
37 33
 #ifndef _GPIO_H_
38 34
 #define _GPIO_H_
39 35
 
40
-#include "scc/tlm_target.h"
41
-#include "scc/signal_target_mixin.h"
36
+#include "cci_configuration"
42 37
 #include "scc/signal_initiator_mixin.h"
38
+#include "scc/signal_target_mixin.h"
39
+#include "scc/tlm_target.h"
40
+#include <memory>
43 41
 #include <tlm/tlm_signal.h>
44
-#include "cci_configuration"
45 42
 
46 43
 namespace sysc {
47 44
 
@@ -50,18 +47,18 @@ class WsHandler;
50 47
 
51 48
 class gpio : public sc_core::sc_module, public scc::tlm_target<> {
52 49
 public:
53
-    SC_HAS_PROCESS(gpio);
50
+    SC_HAS_PROCESS(gpio);// NOLINT
54 51
     sc_core::sc_in<sc_core::sc_time> clk_i;
55 52
     sc_core::sc_in<bool> rst_i;
56 53
     // sc_core::sc_inout_rv<32> pins_io;
57 54
 
58 55
     sc_core::sc_vector<scc::tlm_signal_logic_out> pins_o;
59
-    sc_core::sc_vector<scc::tlm_signal_logic_in>  pins_i;
56
+    sc_core::sc_vector<scc::tlm_signal_logic_in> pins_i;
60 57
 
61 58
     sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof0_o;
62 59
     sc_core::sc_vector<scc::tlm_signal_bool_opt_out> iof1_o;
63
-    sc_core::sc_vector<scc::tlm_signal_bool_opt_in>  iof0_i;
64
-    sc_core::sc_vector<scc::tlm_signal_bool_opt_in>  iof1_i;
60
+    sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof0_i;
61
+    sc_core::sc_vector<scc::tlm_signal_bool_opt_in> iof1_i;
65 62
 
66 63
     gpio(sc_core::sc_module_name nm);
67 64
     virtual ~gpio() override; // need to keep it in source file because of fwd declaration of gpio_regs
@@ -71,19 +68,18 @@ public:
71 68
 protected:
72 69
     void clock_cb();
73 70
     void reset_cb();
74
-    void update_pins();
71
+    void update_pins(uint32_t changed_bits);
75 72
     void before_end_of_elaboration();
76
-    void pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_logic>& gp, sc_core::sc_time& delay);
77
-    void forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_logic>& gp);
78
-    void iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<>& gp, sc_core::sc_time& delay);
73
+    void pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, sc_core::sc_time &delay);
74
+    void forward_pin_input(unsigned int tag, tlm::tlm_signal_gp<sc_dt::sc_logic> &gp);
75
+    void iof_input(unsigned int tag, unsigned iof_idx, tlm::tlm_signal_gp<> &gp, sc_core::sc_time &delay);
79 76
     sc_core::sc_time clk;
80 77
     std::array<bool, 32> last_iof0, last_iof1;
81 78
     std::unique_ptr<gpio_regs> regs;
82 79
     std::shared_ptr<sysc::WsHandler> handler;
83 80
 
84 81
 private:
85
-    tlm::tlm_phase write_output(tlm::tlm_signal_gp<sc_dt::sc_logic>& gp, size_t i, sc_dt::sc_logic val);
86
-    void enable_outputs(uint32_t new_iof_en, uint32_t new_iof_sel);
82
+    tlm::tlm_phase write_output(tlm::tlm_signal_gp<sc_dt::sc_logic> &gp, size_t i, sc_dt::sc_logic val);
87 83
 };
88 84
 
89 85
 } /* namespace sysc */

+ 0
- 101
platform/incl/sysc/SiFive/hifive1.h View File

@@ -1,101 +0,0 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Contributors:
32
-//       eyck@minres.com - initial implementation
33
-//
34
-//
35
-////////////////////////////////////////////////////////////////////////////////
36
-
37
-#ifndef _PLATFORM_H_
38
-#define _PLATFORM_H_
39
-
40
-#include "aon.h"
41
-#include "clint.h"
42
-#include "gpio.h"
43
-#include "plic.h"
44
-#include "prci.h"
45
-#include "spi.h"
46
-#include "uart.h"
47
-#include "sysc/core_complex.h"
48
-
49
-#include "scc/memory.h"
50
-#include "scc/router.h"
51
-#include "scc/utilities.h"
52
-#include "tlm/tlm_signal_sockets.h"
53
-#include <sysc/kernel/sc_module.h>
54
-#include <array>
55
-
56
-
57
-namespace sysc {
58
-
59
-class hifive1 : public sc_core::sc_module {
60
-public:
61
-    SC_HAS_PROCESS(hifive1);
62
-
63
-    sc_core::sc_vector<tlm::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
64
-    sc_core::sc_vector<tlm::tlm_signal_target_socket<sc_dt::sc_logic>>    pins_i;
65
-
66
-    sc_core::sc_in<bool> erst_n;
67
-
68
-    hifive1(sc_core::sc_module_name nm);
69
-
70
-private:
71
-    SiFive::core_complex i_core_complex;
72
-    scc::router<> i_router;
73
-    uart i_uart0, i_uart1;
74
-    spi i_qspi0, i_qspi1, i_qspi2;
75
-    gpio i_gpio0;
76
-    plic i_plic;
77
-    aon i_aon;
78
-    prci i_prci;
79
-    clint i_clint;
80
-
81
-    scc::memory<512_MB, 32> i_mem_qspi;
82
-    scc::memory<128_kB, 32> i_mem_ram;
83
-    sc_core::sc_signal<sc_core::sc_time> s_tlclk;
84
-    sc_core::sc_signal<sc_core::sc_time> s_lfclk;
85
-    sc_core::sc_signal<bool> s_rst, s_mtime_int, s_msie_int;
86
-    sc_core::sc_vector<sc_core::sc_signal<bool, SC_MANY_WRITERS>> s_global_int, s_local_int;
87
-    sc_core::sc_signal<bool> s_core_int;
88
-    sc_core::sc_vector<sc_core::sc_signal<bool>> s_dummy;
89
-    sc_core::sc_vector<scc::tlm_signal_bool_opt_in>  s_dummy_sck_i;
90
-    sc_core::sc_vector<scc::tlm_signal_bool_opt_out> s_dummy_sck_o;
91
-
92
-
93
-protected:
94
-    void gen_reset();
95
-
96
-#include "gen/e300_plat_t.h"
97
-};
98
-
99
-} /* namespace sysc */
100
-
101
-#endif /* _PLATFORM_H_ */

+ 32
- 37
platform/incl/sysc/SiFive/plic.h View File

@@ -1,38 +1,34 @@
1
-////////////////////////////////////////////////////////////////////////////////
2
-// Copyright (C) 2017, MINRES Technologies GmbH
3
-// All rights reserved.
4
-//
5
-// Redistribution and use in source and binary forms, with or without
6
-// modification, are permitted provided that the following conditions are met:
7
-//
8
-// 1. Redistributions of source code must retain the above copyright notice,
9
-//    this list of conditions and the following disclaimer.
10
-//
11
-// 2. Redistributions in binary form must reproduce the above copyright notice,
12
-//    this list of conditions and the following disclaimer in the documentation
13
-//    and/or other materials provided with the distribution.
14
-//
15
-// 3. Neither the name of the copyright holder nor the names of its contributors
16
-//    may be used to endorse or promote products derived from this software
17
-//    without specific prior written permission.
18
-//
19
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
-// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
-// POSSIBILITY OF SUCH DAMAGE.
30
-//
31
-// Contributors:
32
-//       eyck@minres.com - initial implementation
33
-//
34
-//
35
-////////////////////////////////////////////////////////////////////////////////
1
+/*******************************************************************************
2
+ * Copyright (C) 2017, 2018 MINRES Technologies GmbH
3
+ * All rights reserved.
4
+ *
5
+ * Redistribution and use in source and binary forms, with or without
6
+ * modification, are permitted provided that the following conditions are met:
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice,
9
+ *    this list of conditions and the following disclaimer.
10
+ *
11
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
12
+ *    this list of conditions and the following disclaimer in the documentation
13
+ *    and/or other materials provided with the distribution.
14
+ *
15
+ * 3. Neither the name of the copyright holder nor the names of its contributors
16
+ *    may be used to endorse or promote products derived from this software
17
+ *    without specific prior written permission.
18
+ *
19
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
+ * POSSIBILITY OF SUCH DAMAGE.
30
+ *
31
+ *******************************************************************************/
36 32
 
37 33