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update to latest version of SCC

develop
Eyck Jentzsch 1 month ago
parent
commit
140a397549
4 changed files with 15 additions and 21 deletions
  1. +1
    -1
      CMakeLists.txt
  2. +1
    -1
      incl/iss/arch/riscv_hart_msu_vp.h
  3. +8
    -10
      incl/sysc/core_complex.h
  4. +5
    -9
      src/sysc/core_complex.cpp

+ 1
- 1
CMakeLists.txt View File

@ -64,7 +64,7 @@ endif()
add_library(riscv SHARED ${LIB_SOURCES})
target_compile_options(riscv PRIVATE -Wno-shift-count-overflow)
target_include_directories(riscv PUBLIC incl ../external/elfio)
target_link_libraries(riscv PUBLIC softfloat scc-util)
target_link_libraries(riscv PUBLIC softfloat scc-util jsoncpp)
target_link_libraries(riscv PUBLIC -Wl,--whole-archive dbt-core -Wl,--no-whole-archive)
set_target_properties(riscv PROPERTIES
VERSION ${PROJECT_VERSION}

+ 1
- 1
incl/iss/arch/riscv_hart_msu_vp.h View File

@ -328,7 +328,7 @@ public:
void write_mstatus(T val, unsigned priv_lvl) {
auto mask = get_mask(priv_lvl);
auto new_val = (mstatus.st.value & ~mask) | (val & mask);
auto new_val = (mstatus.backing.val & ~mask) | (val & mask);
mstatus = new_val;
}

+ 8
- 10
incl/sysc/core_complex.h View File

@ -33,10 +33,10 @@
#ifndef _SYSC_SIFIVE_FE310_H_
#define _SYSC_SIFIVE_FE310_H_
#include "scc/initiator_mixin.h"
#include "tlm/scc/initiator_mixin.h"
#include "scc/traceable.h"
#include "scc/utilities.h"
#include "scv4tlm/tlm_rec_initiator_socket.h"
#include "tlm/scc/scv/tlm_rec_initiator_socket.h"
#include <cci_configuration>
#include <tlm>
#include <tlm_core/tlm_1/tlm_req_rsp/tlm_1_interfaces/tlm_core_ifs.h>
@ -75,7 +75,7 @@ class core_wrapper;
class core_complex : public sc_core::sc_module, public scc::traceable {
public:
scc::initiator_mixin<scv4tlm::tlm_rec_initiator_socket<32>> initiator{"intor"};
tlm::scc::initiator_mixin<tlm::scc::scv::tlm_rec_initiator_socket<32>> initiator{"intor"};
sc_core::sc_in<sc_core::sc_time> clk_i{"clk_i"};
@ -146,16 +146,14 @@ protected:
std::unique_ptr<iss::vm_if> vm;
sc_core::sc_time curr_clk;
iss::debugger::target_adapter_if *tgt_adapter;
#ifdef WITH_SCV
//! transaction recording database
scv_tr_db *m_db;
SCVNS scv_tr_db *m_db;
//! blocking transaction recording stream handle
scv_tr_stream *stream_handle;
SCVNS scv_tr_stream *stream_handle;
//! transaction generator handle for blocking transactions
scv_tr_generator<_scv_tr_generator_default_data, _scv_tr_generator_default_data> *instr_tr_handle;
scv_tr_generator<uint64_t, _scv_tr_generator_default_data> *fetch_tr_handle;
scv_tr_handle tr_handle;
#endif
SCVNS scv_tr_generator<SCVNS _scv_tr_generator_default_data, SCVNS _scv_tr_generator_default_data> *instr_tr_handle;
SCVNS scv_tr_generator<uint64_t, SCVNS _scv_tr_generator_default_data> *fetch_tr_handle;
SCVNS scv_tr_handle tr_handle;
};
} /* namespace SiFive */

+ 5
- 9
src/sysc/core_complex.cpp View File

@ -168,7 +168,7 @@ public:
void wait_until(uint64_t flags) override {
SCCDEBUG(owner->name()) << "Sleeping until interrupt";
do {
wait(wfi_evt);
sc_core::wait(wfi_evt);
} while (this->reg.pending_trap == 0);
base_type::wait_until(flags);
}
@ -315,27 +315,23 @@ void core_complex::start_of_simulation() {
reset_address.set_value(start_addr.first);
}
}
#ifdef WITH_SCV
if (m_db != nullptr && stream_handle == nullptr) {
string basename(this->name());
stream_handle = new scv_tr_stream((basename + ".instr").c_str(), "TRANSACTOR", m_db);
instr_tr_handle = new scv_tr_generator<>("execute", *stream_handle);
fetch_tr_handle = new scv_tr_generator<uint64_t>("fetch", *stream_handle);
stream_handle = new SCVNS scv_tr_stream((basename + ".instr").c_str(), "TRANSACTOR", m_db);
instr_tr_handle = new SCVNS scv_tr_generator<>("execute", *stream_handle);
fetch_tr_handle = new SCVNS scv_tr_generator<uint64_t>("fetch", *stream_handle);
}
#endif
}
void core_complex::disass_output(uint64_t pc, const std::string instr_str) {
#ifdef WITH_SCV
if (m_db == nullptr) return;
if (tr_handle.is_active()) tr_handle.end_transaction();
tr_handle = instr_tr_handle->begin_transaction();
tr_handle.record_attribute("PC", pc);
tr_handle.record_attribute("INSTR", instr_str);
tr_handle.record_attribute("MODE", lvl[cpu->get_mode()]);
tr_handle.record_attribute("MSTATUS", cpu->get_state().mstatus.st.value);
tr_handle.record_attribute("MSTATUS", cpu->get_state().mstatus.backing.val);
tr_handle.record_attribute("LTIME_START", quantum_keeper.get_current_time().value() / 1000);
#endif
}
void core_complex::clk_cb() {

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